| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 299 unsigned FirstReg = 0; in CreateRegs() local
307 if (!FirstReg) FirstReg = R; in CreateRegs()
310 return FirstReg; in CreateRegs()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 475 unsigned FirstReg = 0; in ScanInstruction() local
482 if (FirstReg != 0) { in ScanInstruction()
484 State->UnionGroups(FirstReg, Reg); in ScanInstruction()
487 FirstReg = Reg; in ScanInstruction()
491 DEBUG(dbgs() << "->g" << State->GetGroup(FirstReg) << '\n'); in ScanInstruction()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 675 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect() local
681 if (MRI.getRegClass(FirstReg)->contains(PPC::R0) || in insertSelect()
682 MRI.getRegClass(FirstReg)->contains(PPC::X0)) { in insertSelect()
684 MRI.getRegClass(FirstReg)->contains(PPC::X0) ? in insertSelect()
686 unsigned OldFirstReg = FirstReg; in insertSelect()
687 FirstReg = MRI.createVirtualRegister(FirstRC); in insertSelect()
688 BuildMI(MBB, MI, dl, get(TargetOpcode::COPY), FirstReg) in insertSelect()
693 .addReg(FirstReg).addReg(SecondReg) in insertSelect()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3576 const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, in copyByValRegs() argument
3581 unsigned NumRegs = LastReg - FirstReg; in copyByValRegs()
3591 (int)((ByValArgRegs.size() - FirstReg) * GPRSizeInBytes); in copyByValRegs()
3609 unsigned ArgReg = ByValArgRegs[FirstReg + I]; in copyByValRegs()
3626 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, in passByValArg() argument
3634 unsigned NumRegs = LastReg - FirstReg; in passByValArg()
3649 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg()
3698 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg()
3774 unsigned FirstReg = 0; in HandleByVal() local
3790 FirstReg = State->getFirstUnallocated(IntArgRegs.data(), IntArgRegs.size()); in HandleByVal()
[all …]
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| H A D | MipsISelLowering.h | 431 const Argument *FuncArg, unsigned FirstReg,
440 unsigned FirstReg, unsigned LastReg,
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 1174 if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::dsub0)) in printVectorList() local
1175 Reg = FirstReg; in printVectorList()
1176 else if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::qsub0)) in printVectorList() local
1177 Reg = FirstReg; in printVectorList()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1164 unsigned FirstReg = FirstRegs[NumRegs - 1]; in addVectorList64Operands() local
1167 MCOperand::CreateReg(FirstReg + getVectorListStart() - AArch64::Q0)); in addVectorList64Operands()
1175 unsigned FirstReg = FirstRegs[NumRegs - 1]; in addVectorList128Operands() local
1178 MCOperand::CreateReg(FirstReg + getVectorListStart() - AArch64::Q0)); in addVectorList128Operands()
2831 int64_t FirstReg = tryMatchVectorRegister(Kind, true); in parseVectorList() local
2832 if (FirstReg == -1) in parseVectorList()
2834 int64_t PrevReg = FirstReg; in parseVectorList()
2893 FirstReg, Count, NumElements, ElementKind, S, getLoc(), getContext())); in parseVectorList()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3662 unsigned FirstReg = Reg; in parseVectorList() local
3666 FirstReg = Reg = getDRegFromQReg(Reg); in parseVectorList()
3808 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList()
3811 Operands.push_back(ARMOperand::CreateVectorList(FirstReg, Count, in parseVectorList()
3821 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList()
3823 Operands.push_back(ARMOperand::CreateVectorListAllLanes(FirstReg, Count, in parseVectorList()
3828 Operands.push_back(ARMOperand::CreateVectorListIndexed(FirstReg, Count, in parseVectorList()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2027 unsigned FirstReg = MI->getOperand(RegListIdx).getReg(); in tryFoldSPUpdateIntoPushPop() local
2048 for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded; in tryFoldSPUpdateIntoPushPop()
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