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Searched refs:Def (Results 1 – 25 of 128) sorted by relevance

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/minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/
H A DPeepholeOptimizer.cpp192 const MachineInstr *Def; member in __anon72af3e1c0111::ValueTracker
250 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg), in ValueTracker()
253 Def = MRI.getVRegDef(Reg); in ValueTracker()
269 : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg), in ValueTracker()
271 assert(DefIdx < Def->getDesc().getNumDefs() && in ValueTracker()
272 Def->getOperand(DefIdx).isReg() && "Invalid definition"); in ValueTracker()
273 Reg = Def->getOperand(DefIdx).getReg(); in ValueTracker()
954 TargetInstrInfo::RegSubRegPair Def(MODef.getReg(), MODef.getSubReg()); in optimizeUncoalescableCopy() local
955 TargetInstrInfo::RegSubRegPair Src = Def; in optimizeUncoalescableCopy()
958 RewritePairs.push_back(std::make_pair(Def, Src)); in optimizeUncoalescableCopy()
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H A DMachineCopyPropagation.cpp114 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src, in isNopCopy() argument
117 if (Def == SrcSrc) in isNopCopy()
119 if (TRI->isSubRegister(SrcSrc, Def)) { in isNopCopy()
121 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def); in isNopCopy()
151 unsigned Def = MI->getOperand(0).getReg(); in CopyPropagateBlock() local
154 if (TargetRegisterInfo::isVirtualRegister(Def) || in CopyPropagateBlock()
162 if (!MRI->isReserved(Def) && in CopyPropagateBlock()
164 isNopCopy(CopyMI, Def, Src, TRI)) { in CopyPropagateBlock()
184 I->clearRegisterKills(Def, TRI); in CopyPropagateBlock()
214 SourceNoLongerAvailable(Def, SrcMap, AvailCopyMap); in CopyPropagateBlock()
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H A DLiveVariables.cpp198 MachineInstr *Def = PhysRegDef[SubReg]; in FindLastPartialDef() local
199 if (!Def) in FindLastPartialDef()
201 unsigned Dist = DistanceMap[Def]; in FindLastPartialDef()
204 LastDef = Def; in FindLastPartialDef()
291 MachineInstr *Def = PhysRegDef[SubReg]; in FindLastRefOrPartRef() local
292 if (Def && Def != LastDef) { in FindLastRefOrPartRef()
295 unsigned Dist = DistanceMap[Def]; in FindLastRefOrPartRef()
340 MachineInstr *Def = PhysRegDef[SubReg]; in HandlePhysRegKill() local
341 if (Def && Def != LastDef) { in HandlePhysRegKill()
344 unsigned Dist = DistanceMap[Def]; in HandlePhysRegKill()
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H A DExecutionDepsFix.cpp126 int Def; member
374 LiveRegs[rx].Def = -(1 << 20); in enterBasicBlock()
385 LiveRegs[rx].Def = -1; in enterBasicBlock()
404 LiveRegs[rx].Def = std::max(LiveRegs[rx].Def, fi->second[rx].Def); in enterBasicBlock()
444 LiveRegs[i].Def -= CurInstr; in leaveBasicBlock()
479 unsigned Clearance = CurInstr - LiveRegs[rx].Def; in shouldBreakDependence()
536 LiveRegs[rx].Def = CurInstr; in processDefs()
665 if (LR.Def < i->Def) { in visitSoftInstr()
H A DLiveInterval.cpp53 VNInfo *LiveRange::createDeadDef(SlotIndex Def, in createDeadDef() argument
55 assert(!Def.isDead() && "Cannot define a value at the dead slot"); in createDeadDef()
56 iterator I = find(Def); in createDeadDef()
58 VNInfo *VNI = getNextValue(Def, VNInfoAllocator); in createDeadDef()
59 segments.push_back(Segment(Def, Def.getDeadSlot(), VNI)); in createDeadDef()
62 if (SlotIndex::isSameInstr(Def, I->start)) { in createDeadDef()
70 Def = std::min(Def, I->start); in createDeadDef()
71 if (Def != I->start) in createDeadDef()
72 I->start = I->valno->def = Def; in createDeadDef()
75 assert(SlotIndex::isEarlierInstr(Def, I->start) && "Already live at def"); in createDeadDef()
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H A DSplitKit.cpp382 SlotIndex Def = OldVNI->def; in defValue() local
383 LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), OldVNI)); in defValue()
389 SlotIndex Def = VNI->def; in defValue() local
390 LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), VNI)); in defValue()
409 SlotIndex Def = VNI->def; in forceRecompute() local
411 LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), VNI)); in forceRecompute()
422 SlotIndex Def; in defFromParent() local
432 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, TRI, Late); in defFromParent()
438 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late) in defFromParent()
444 return defValue(RegIdx, ParentVNI, Def); in defFromParent()
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H A DMachineLICM.cpp157 unsigned Def; member
160 : MI(mi), Def(def), FI(fi) {} in CandidateInfo()
170 void HoistPostRA(MachineInstr *MI, unsigned Def);
415 unsigned Def = 0; in ProcessMI() local
465 if (Def) in ProcessMI()
468 Def = Reg; in ProcessMI()
486 if (Def && !RuledOut) { in ProcessMI()
490 Candidates.push_back(CandidateInfo(MI, Def, FI)); in ProcessMI()
566 unsigned Def = Candidates[i].Def; in HoistRegionPostRA() local
567 if (!PhysRegClobbers.test(Def) && !TermRegs.test(Def)) { in HoistRegionPostRA()
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/minix3/external/bsd/llvm/dist/llvm/lib/IR/
H A DDominators.cpp81 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
84 const BasicBlock *DefBB = Def->getParent(); in dominates()
95 if (Def == User) in dominates()
102 if (isa<InvokeInst>(Def) || isa<PHINode>(User)) in dominates()
103 return dominates(Def, UseBB); in dominates()
110 for (; &*I != Def && &*I != User; ++I) in dominates()
113 return &*I == Def; in dominates()
118 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
120 const BasicBlock *DefBB = Def->getParent(); in dominates()
133 const InvokeInst *II = dyn_cast<InvokeInst>(Def); in dominates()
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/minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp490 static bool canDefBePartOfLOH(const MachineInstr *Def) { in canDefBePartOfLOH() argument
491 unsigned Opc = Def->getOpcode(); in canDefBePartOfLOH()
500 switch (Def->getOperand(2).getType()) { in canDefBePartOfLOH()
511 switch (Def->getOperand(2).getType()) { in canDefBePartOfLOH()
565 const MachineInstr *Def = DefsIt.first; in reachedUsesToDefs() local
569 if ((ADRPMode && Def->getOpcode() != AArch64::ADRP) || in reachedUsesToDefs()
570 (!ADRPMode && !canDefBePartOfLOH(Def)) || in reachedUsesToDefs()
691 const MachineInstr *Def = *UseToDefs.find(Instr)->second.begin(); in isCandidate() local
692 if (Def->getOpcode() != AArch64::ADRP) { in isCandidate()
699 if (!MDT->dominates(Def, Instr)) in isCandidate()
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H A DAArch64AdvSIMDScalarPass.cpp206 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
208 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
209 Src0 = getSrcFromCopy(&*Def, MRI, SubReg0); in isProfitableToTransform()
219 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
221 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
222 Src1 = getSrcFromCopy(&*Def, MRI, SubReg1); in isProfitableToTransform()
299 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
301 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in transformInstruction()
302 Src0 = getSrcFromCopy(&*Def, MRI, SubReg0); in transformInstruction()
307 Def->eraseFromParent(); in transformInstruction()
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/minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/
H A DSIFixSGPRLiveRanges.cpp120 unsigned Def = MO.getReg(); in runOnMachineFunction() local
121 if (TargetRegisterInfo::isVirtualRegister(Def)) { in runOnMachineFunction()
122 if (TRI->isSGPRClass(MRI.getRegClass(Def))) in runOnMachineFunction()
124 std::make_pair(Def, &LIS->getInterval(Def))); in runOnMachineFunction()
125 } else if (TRI->isSGPRClass(TRI->getPhysRegClass(Def))) { in runOnMachineFunction()
127 std::make_pair(Def, &LIS->getRegUnit(Def))); in runOnMachineFunction()
H A DSIShrinkInstructions.cpp147 MachineInstr *Def = MRI.getUniqueVRegDef(Reg); in foldImmediates() local
148 if (Def && Def->isMoveImmediate()) { in foldImmediates()
149 MachineOperand &MovSrc = Def->getOperand(1); in foldImmediates()
158 Def->eraseFromParent(); in foldImmediates()
H A DR600EmitClauseMarkers.cpp183 MachineBasicBlock::iterator Def, in canClauseLocalKillFitInClause() argument
187 MOI = Def->operands_begin(), in canClauseLocalKillFitInClause()
188 MOE = Def->operands_end(); MOI != MOE; ++MOI) { in canClauseLocalKillFitInClause()
196 for (MachineBasicBlock::iterator UseI = Def; UseI != BBEnd; ++UseI) { in canClauseLocalKillFitInClause()
216 if (UseI != Def && UseI->findRegisterDefOperandIdx(MOI->getReg()) != -1) in canClauseLocalKillFitInClause()
H A DSIFixSGPRCopies.cpp169 MachineInstr *Def = MRI.getVRegDef(Reg); in inferRegClassFromDef() local
170 if (Def->getOpcode() != AMDGPU::COPY) { in inferRegClassFromDef()
174 return inferRegClassFromDef(TRI, MRI, Def->getOperand(1).getReg(), in inferRegClassFromDef()
175 Def->getOperand(1).getSubReg()); in inferRegClassFromDef()
/minix3/external/bsd/llvm/dist/llvm/utils/TableGen/
H A DCodeGenSchedule.h61 CodeGenSchedRW(unsigned Idx, Record *Def) in CodeGenSchedRW()
62 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) { in CodeGenSchedRW()
63 Name = Def->getName(); in CodeGenSchedRW()
64 IsRead = Def->isSubClassOf("SchedRead"); in CodeGenSchedRW()
65 HasVariants = Def->isSubClassOf("SchedVariant"); in CodeGenSchedRW()
67 IsVariadic = Def->getValueAsBit("Variadic"); in CodeGenSchedRW()
72 IsSequence = Def->isSubClassOf("WriteSequence"); in CodeGenSchedRW()
324 CodeGenSchedRW &getSchedRW(Record *Def) { in getSchedRW() argument
325 bool IsRead = Def->isSubClassOf("SchedRead"); in getSchedRW()
326 unsigned Idx = getSchedRWIdx(Def, IsRead); in getSchedRW()
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H A DDAGISelMatcherGen.cpp621 Record *Def = DI->getDef(); in EmitResultLeafAsOperand() local
622 if (Def->isSubClassOf("Register")) { in EmitResultLeafAsOperand()
624 CGP.getTargetInfo().getRegBank().getReg(Def); in EmitResultLeafAsOperand()
630 if (Def->getName() == "zero_reg") { in EmitResultLeafAsOperand()
638 if (Def->isSubClassOf("RegisterOperand")) in EmitResultLeafAsOperand()
639 Def = Def->getValueAsDef("RegClass"); in EmitResultLeafAsOperand()
640 if (Def->isSubClassOf("RegisterClass")) { in EmitResultLeafAsOperand()
641 std::string Value = getQualifiedName(Def) + "RegClassID"; in EmitResultLeafAsOperand()
648 if (Def->isSubClassOf("SubRegIndex")) { in EmitResultLeafAsOperand()
649 std::string Value = getQualifiedName(Def); in EmitResultLeafAsOperand()
/minix3/external/bsd/llvm/dist/clang/lib/Lex/
H A DMacroInfo.cpp198 for (DefInfo Def = getDefinition(); Def; Def = Def.getPreviousDefinition()) { in findDirectiveAtLoc() local
199 if (Def.getLocation().isInvalid() || // For macros defined on the command line. in findDirectiveAtLoc()
200 SM.isBeforeInTranslationUnit(Def.getLocation(), L)) in findDirectiveAtLoc()
201 return (!Def.isUndefined() || in findDirectiveAtLoc()
202 SM.isBeforeInTranslationUnit(L, Def.getUndefLocation())) in findDirectiveAtLoc()
203 ? Def : DefInfo(); in findDirectiveAtLoc()
H A DPreprocessingRecord.cpp323 MacroDefinition *Def) { in RegisterMacroDefinition() argument
324 MacroDefinitions[Macro] = Def; in RegisterMacroDefinition()
379 else if (MacroDefinition *Def = findMacroDefinition(MI)) in addMacroExpansion() local
381 new (*this) MacroExpansion(Def, Range)); in addMacroExpansion()
423 MacroDefinition *Def in MacroDefined() local
425 addPreprocessedEntity(Def); in MacroDefined()
426 MacroDefinitions[MI] = Def; in MacroDefined()
/minix3/external/bsd/llvm/dist/clang/test/Modules/
H A Ddecldef.m7 @class Def;
8 Def *def;
12 A *a1; // expected-error{{declaration of 'A' must be imported from module 'decldef.Def' before it i…
23 …// expected-error@-2{{definition of 'A' must be imported from module 'decldef.Def' before it is re…
H A Ddecldef.mm11 @class Def;
12 Def *def;
24 A *a1; // expected-error{{declaration of 'A' must be imported from module 'decldef.Def'}}
37 …// expected-error@-2{{definition of 'A' must be imported from module 'decldef.Def' before it is re…
47 …// expected-error@-2{{definition of 'B' must be imported from module 'decldef.Def' before it is re…
/minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp206 MachineInstr *Def = Op->getParent(); in eraseInstrWithNoUses() local
210 if (DeadInstr.find(Def) != DeadInstr.end()) in eraseInstrWithNoUses()
217 for (unsigned int j = 0; j < Def->getNumOperands(); ++j) { in eraseInstrWithNoUses()
218 MachineOperand &MODef = Def->getOperand(j); in eraseInstrWithNoUses()
230 if (&*II == Def) in eraseInstrWithNoUses()
241 DEBUG(dbgs() << "Deleting instruction " << *Def << "\n"); in eraseInstrWithNoUses()
242 DeadInstr.insert(Def); in eraseInstrWithNoUses()
311 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern() local
312 if (!Def) in optimizeSDPattern()
314 if (Def->isImplicitDef()) in optimizeSDPattern()
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/minix3/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp40 : Def(false), Use(false), IndirectDef(false), IndirectUse(false) {} in Reference()
43 Def |= Other.Def; in operator |=()
50 LLVM_EXPLICIT operator bool() const { return Def || Use; } in operator bool()
54 bool Def; member
151 Ref.Def = true; in getRegReferences()
347 (!CCRefs.Def && adjustCCMasksForInstr(MI, Compare, CCUsers))) { in optimizeCompareZero()
353 if (SrcRefs.Def) in optimizeCompareZero()
356 if (CCRefs.Use && CCRefs.Def) in optimizeCompareZero()
450 if (CCRefs.Def) { in processBlock()
/minix3/external/bsd/llvm/dist/clang/utils/TableGen/
H A DNeonEmitter.cpp1964 for (auto *Def : Defs) { in genBuiltinsDef() local
1965 if (Def->hasBody()) in genBuiltinsDef()
1969 if (Def->hasSplat()) in genBuiltinsDef()
1972 std::string S = "BUILTIN(__builtin_neon_" + Def->getMangledName() + ", \""; in genBuiltinsDef()
1974 S += Def->getBuiltinTypeStr(); in genBuiltinsDef()
2002 for (auto *Def : Defs) { in genOverloadTypeCheckCode() local
2005 if (Def->hasBody()) in genOverloadTypeCheckCode()
2009 if (Def->hasSplat()) in genOverloadTypeCheckCode()
2013 if (Def->protoHasScalar()) in genOverloadTypeCheckCode()
2017 Type Ty = Def->getReturnType(); in genOverloadTypeCheckCode()
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/minix3/external/bsd/llvm/dist/clang/lib/Serialization/
H A DASTCommon.cpp104 if (const TagDecl *Def = cast<TagDecl>(DC)->getDefinition()) in getDefinitiveDeclContext() local
105 return Def; in getDefinitiveDeclContext()
132 if (const ObjCProtocolDecl *Def in getDefinitiveDeclContext() local
134 return Def; in getDefinitiveDeclContext()
/minix3/external/bsd/llvm/dist/llvm/lib/TableGen/
H A DSetTheory.cpp236 void expand(SetTheory &ST, Record *Def, RecSet &Elts) override { in expand()
237 ST.evaluate(Def->getValueInit(FieldName), Elts, Def->getLoc()); in expand()
274 if (DefInit *Def = dyn_cast<DefInit>(Expr)) { in evaluate() local
275 if (const RecVec *Result = expand(Def->getDef())) in evaluate()
277 Elts.insert(Def->getDef()); in evaluate()

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