| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/ |
| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8() argument
16 return __riscv_vsll(op1, shift, vl); in test_vsll_vv_i8mf8()
25 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8() argument
26 return __riscv_vsll(op1, shift, vl); in test_vsll_vx_i8mf8()
35 vint8mf4_t test_vsll_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsll_vv_i8mf4() argument
36 return __riscv_vsll(op1, shift, vl); in test_vsll_vv_i8mf4()
45 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4() argument
46 return __riscv_vsll(op1, shift, vl); in test_vsll_vx_i8mf4()
55 vint8mf2_t test_vsll_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsll_vv_i8mf2() argument
56 return __riscv_vsll(op1, shift, vl); in test_vsll_vv_i8mf2()
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| H A D | vsra.c | 15 vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsra_vv_i8mf8() argument
16 return __riscv_vsra(op1, shift, vl); in test_vsra_vv_i8mf8()
25 vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8() argument
26 return __riscv_vsra(op1, shift, vl); in test_vsra_vx_i8mf8()
35 vint8mf4_t test_vsra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsra_vv_i8mf4() argument
36 return __riscv_vsra(op1, shift, vl); in test_vsra_vv_i8mf4()
45 vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4() argument
46 return __riscv_vsra(op1, shift, vl); in test_vsra_vx_i8mf4()
55 vint8mf2_t test_vsra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsra_vv_i8mf2() argument
56 return __riscv_vsra(op1, shift, vl); in test_vsra_vv_i8mf2()
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| H A D | vsrl.c | 15 vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsrl_vv_u8mf8() argument
16 return __riscv_vsrl(op1, shift, vl); in test_vsrl_vv_u8mf8()
25 vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8() argument
26 return __riscv_vsrl(op1, shift, vl); in test_vsrl_vx_u8mf8()
35 vuint8mf4_t test_vsrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsrl_vv_u8mf4() argument
36 return __riscv_vsrl(op1, shift, vl); in test_vsrl_vv_u8mf4()
45 vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4() argument
46 return __riscv_vsrl(op1, shift, vl); in test_vsrl_vx_u8mf4()
55 vuint8mf2_t test_vsrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsrl_vv_u8mf2() argument
56 return __riscv_vsrl(op1, shift, vl); in test_vsrl_vv_u8mf2()
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| H A D | vssra.c | 15 vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssra_vv_i8mf8() argument
16 return __riscv_vssra(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vv_i8mf8()
25 vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf8() argument
26 return __riscv_vssra(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vx_i8mf8()
35 vint8mf4_t test_vssra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssra_vv_i8mf4() argument
36 return __riscv_vssra(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vv_i8mf4()
45 vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf4() argument
46 return __riscv_vssra(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vx_i8mf4()
55 vint8mf2_t test_vssra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssra_vv_i8mf2() argument
56 return __riscv_vssra(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vv_i8mf2()
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| H A D | vssrl.c | 15 vuint8mf8_t test_vssrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssrl_vv_u8mf8() argument
16 return __riscv_vssrl(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vv_u8mf8()
25 vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf8() argument
26 return __riscv_vssrl(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vx_u8mf8()
35 vuint8mf4_t test_vssrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssrl_vv_u8mf4() argument
36 return __riscv_vssrl(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vv_u8mf4()
45 vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf4() argument
46 return __riscv_vssrl(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vx_u8mf4()
55 vuint8mf2_t test_vssrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssrl_vv_u8mf2() argument
56 return __riscv_vssrl(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vv_u8mf2()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsrl_wv_u8mf8() argument
16 return __riscv_vnsrl(op1, shift, vl); in test_vnsrl_wv_u8mf8()
25 vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf8() argument
26 return __riscv_vnsrl(op1, shift, vl); in test_vnsrl_wx_u8mf8()
35 vuint8mf4_t test_vnsrl_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsrl_wv_u8mf4() argument
36 return __riscv_vnsrl(op1, shift, vl); in test_vnsrl_wv_u8mf4()
45 vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf4() argument
46 return __riscv_vnsrl(op1, shift, vl); in test_vnsrl_wx_u8mf4()
55 vuint8mf2_t test_vnsrl_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsrl_wv_u8mf2() argument
56 return __riscv_vnsrl(op1, shift, vl); in test_vnsrl_wv_u8mf2()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsra_wv_i8mf8() argument
16 return __riscv_vnsra(op1, shift, vl); in test_vnsra_wv_i8mf8()
25 vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8() argument
26 return __riscv_vnsra(op1, shift, vl); in test_vnsra_wx_i8mf8()
35 vint8mf4_t test_vnsra_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsra_wv_i8mf4() argument
36 return __riscv_vnsra(op1, shift, vl); in test_vnsra_wv_i8mf4()
45 vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4() argument
46 return __riscv_vnsra(op1, shift, vl); in test_vnsra_wx_i8mf4()
55 vint8mf2_t test_vnsra_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsra_wv_i8mf2() argument
56 return __riscv_vnsra(op1, shift, vl); in test_vnsra_wv_i8mf2()
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| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/ |
| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8() argument
16 return __riscv_vsll_vv_i8mf8(op1, shift, vl); in test_vsll_vv_i8mf8()
25 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8() argument
26 return __riscv_vsll_vx_i8mf8(op1, shift, vl); in test_vsll_vx_i8mf8()
35 vint8mf4_t test_vsll_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsll_vv_i8mf4() argument
36 return __riscv_vsll_vv_i8mf4(op1, shift, vl); in test_vsll_vv_i8mf4()
45 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4() argument
46 return __riscv_vsll_vx_i8mf4(op1, shift, vl); in test_vsll_vx_i8mf4()
55 vint8mf2_t test_vsll_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsll_vv_i8mf2() argument
56 return __riscv_vsll_vv_i8mf2(op1, shift, vl); in test_vsll_vv_i8mf2()
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| H A D | vsra.c | 15 vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsra_vv_i8mf8() argument
16 return __riscv_vsra_vv_i8mf8(op1, shift, vl); in test_vsra_vv_i8mf8()
25 vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8() argument
26 return __riscv_vsra_vx_i8mf8(op1, shift, vl); in test_vsra_vx_i8mf8()
35 vint8mf4_t test_vsra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsra_vv_i8mf4() argument
36 return __riscv_vsra_vv_i8mf4(op1, shift, vl); in test_vsra_vv_i8mf4()
45 vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4() argument
46 return __riscv_vsra_vx_i8mf4(op1, shift, vl); in test_vsra_vx_i8mf4()
55 vint8mf2_t test_vsra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsra_vv_i8mf2() argument
56 return __riscv_vsra_vv_i8mf2(op1, shift, vl); in test_vsra_vv_i8mf2()
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| H A D | vsrl.c | 15 vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsrl_vv_u8mf8() argument
16 return __riscv_vsrl_vv_u8mf8(op1, shift, vl); in test_vsrl_vv_u8mf8()
25 vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8() argument
26 return __riscv_vsrl_vx_u8mf8(op1, shift, vl); in test_vsrl_vx_u8mf8()
35 vuint8mf4_t test_vsrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsrl_vv_u8mf4() argument
36 return __riscv_vsrl_vv_u8mf4(op1, shift, vl); in test_vsrl_vv_u8mf4()
45 vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4() argument
46 return __riscv_vsrl_vx_u8mf4(op1, shift, vl); in test_vsrl_vx_u8mf4()
55 vuint8mf2_t test_vsrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsrl_vv_u8mf2() argument
56 return __riscv_vsrl_vv_u8mf2(op1, shift, vl); in test_vsrl_vv_u8mf2()
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| H A D | vssrl.c | 15 vuint8mf8_t test_vssrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssrl_vv_u8mf8() argument
16 return __riscv_vssrl_vv_u8mf8(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vv_u8mf8()
25 vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf8() argument
26 return __riscv_vssrl_vx_u8mf8(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vx_u8mf8()
35 vuint8mf4_t test_vssrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssrl_vv_u8mf4() argument
36 return __riscv_vssrl_vv_u8mf4(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vv_u8mf4()
45 vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf4() argument
46 return __riscv_vssrl_vx_u8mf4(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vx_u8mf4()
55 vuint8mf2_t test_vssrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssrl_vv_u8mf2() argument
56 return __riscv_vssrl_vv_u8mf2(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssrl_vv_u8mf2()
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| H A D | vssra.c | 15 vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssra_vv_i8mf8() argument
16 return __riscv_vssra_vv_i8mf8(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vv_i8mf8()
25 vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf8() argument
26 return __riscv_vssra_vx_i8mf8(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vx_i8mf8()
35 vint8mf4_t test_vssra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssra_vv_i8mf4() argument
36 return __riscv_vssra_vv_i8mf4(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vv_i8mf4()
45 vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf4() argument
46 return __riscv_vssra_vx_i8mf4(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vx_i8mf4()
55 vint8mf2_t test_vssra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssra_vv_i8mf2() argument
56 return __riscv_vssra_vv_i8mf2(op1, shift, __RISCV_VXRM_RNU, vl); in test_vssra_vv_i8mf2()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsrl_wv_u8mf8() argument
16 return __riscv_vnsrl_wv_u8mf8(op1, shift, vl); in test_vnsrl_wv_u8mf8()
25 vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf8() argument
26 return __riscv_vnsrl_wx_u8mf8(op1, shift, vl); in test_vnsrl_wx_u8mf8()
35 vuint8mf4_t test_vnsrl_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsrl_wv_u8mf4() argument
36 return __riscv_vnsrl_wv_u8mf4(op1, shift, vl); in test_vnsrl_wv_u8mf4()
45 vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf4() argument
46 return __riscv_vnsrl_wx_u8mf4(op1, shift, vl); in test_vnsrl_wx_u8mf4()
55 vuint8mf2_t test_vnsrl_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsrl_wv_u8mf2() argument
56 return __riscv_vnsrl_wv_u8mf2(op1, shift, vl); in test_vnsrl_wv_u8mf2()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsra_wv_i8mf8() argument
16 return __riscv_vnsra_wv_i8mf8(op1, shift, vl); in test_vnsra_wv_i8mf8()
25 vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8() argument
26 return __riscv_vnsra_wx_i8mf8(op1, shift, vl); in test_vnsra_wx_i8mf8()
35 vint8mf4_t test_vnsra_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsra_wv_i8mf4() argument
36 return __riscv_vnsra_wv_i8mf4(op1, shift, vl); in test_vnsra_wv_i8mf4()
45 vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4() argument
46 return __riscv_vnsra_wx_i8mf4(op1, shift, vl); in test_vnsra_wx_i8mf4()
55 vint8mf2_t test_vnsra_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsra_wv_i8mf2() argument
56 return __riscv_vnsra_wv_i8mf2(op1, shift, vl); in test_vnsra_wv_i8mf2()
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| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/ |
| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl… in test_vsll_vv_i8mf8_tu() argument
16 return __riscv_vsll_tu(maskedoff, op1, shift, vl); in test_vsll_vv_i8mf8_tu()
25 vint8mf8_t test_vsll_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8_tu() argument
26 return __riscv_vsll_tu(maskedoff, op1, shift, vl); in test_vsll_vx_i8mf8_tu()
35 vint8mf4_t test_vsll_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl… in test_vsll_vv_i8mf4_tu() argument
36 return __riscv_vsll_tu(maskedoff, op1, shift, vl); in test_vsll_vv_i8mf4_tu()
45 vint8mf4_t test_vsll_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4_tu() argument
46 return __riscv_vsll_tu(maskedoff, op1, shift, vl); in test_vsll_vx_i8mf4_tu()
55 vint8mf2_t test_vsll_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl… in test_vsll_vv_i8mf2_tu() argument
56 return __riscv_vsll_tu(maskedoff, op1, shift, vl); in test_vsll_vv_i8mf2_tu()
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| H A D | vsrl.c | 15 vuint8mf8_t test_vsrl_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t… in test_vsrl_vv_u8mf8_tu() argument
16 return __riscv_vsrl_tu(maskedoff, op1, shift, vl); in test_vsrl_vv_u8mf8_tu()
25 vuint8mf8_t test_vsrl_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8_tu() argument
26 return __riscv_vsrl_tu(maskedoff, op1, shift, vl); in test_vsrl_vx_u8mf8_tu()
35 vuint8mf4_t test_vsrl_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t… in test_vsrl_vv_u8mf4_tu() argument
36 return __riscv_vsrl_tu(maskedoff, op1, shift, vl); in test_vsrl_vv_u8mf4_tu()
45 vuint8mf4_t test_vsrl_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4_tu() argument
46 return __riscv_vsrl_tu(maskedoff, op1, shift, vl); in test_vsrl_vx_u8mf4_tu()
55 vuint8mf2_t test_vsrl_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t… in test_vsrl_vv_u8mf2_tu() argument
56 return __riscv_vsrl_tu(maskedoff, op1, shift, vl); in test_vsrl_vv_u8mf2_tu()
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| H A D | vsra.c | 15 vint8mf8_t test_vsra_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl… in test_vsra_vv_i8mf8_tu() argument
16 return __riscv_vsra_tu(maskedoff, op1, shift, vl); in test_vsra_vv_i8mf8_tu()
25 vint8mf8_t test_vsra_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8_tu() argument
26 return __riscv_vsra_tu(maskedoff, op1, shift, vl); in test_vsra_vx_i8mf8_tu()
35 vint8mf4_t test_vsra_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl… in test_vsra_vv_i8mf4_tu() argument
36 return __riscv_vsra_tu(maskedoff, op1, shift, vl); in test_vsra_vv_i8mf4_tu()
45 vint8mf4_t test_vsra_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4_tu() argument
46 return __riscv_vsra_tu(maskedoff, op1, shift, vl); in test_vsra_vx_i8mf4_tu()
55 vint8mf2_t test_vsra_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl… in test_vsra_vv_i8mf2_tu() argument
56 return __riscv_vsra_tu(maskedoff, op1, shift, vl); in test_vsra_vv_i8mf2_tu()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t … in test_vnsra_wv_i8mf8_tu() argument
16 return __riscv_vnsra_tu(maskedoff, op1, shift, vl); in test_vnsra_wv_i8mf8_tu()
25 vint8mf8_t test_vnsra_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8_tu() argument
26 return __riscv_vnsra_tu(maskedoff, op1, shift, vl); in test_vnsra_wx_i8mf8_tu()
35 vint8mf4_t test_vnsra_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t … in test_vnsra_wv_i8mf4_tu() argument
36 return __riscv_vnsra_tu(maskedoff, op1, shift, vl); in test_vnsra_wv_i8mf4_tu()
45 vint8mf4_t test_vnsra_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4_tu() argument
46 return __riscv_vnsra_tu(maskedoff, op1, shift, vl); in test_vnsra_wx_i8mf4_tu()
55 vint8mf2_t test_vnsra_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t v… in test_vnsra_wv_i8mf2_tu() argument
56 return __riscv_vnsra_tu(maskedoff, op1, shift, vl); in test_vnsra_wv_i8mf2_tu()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size… in test_vnsrl_wv_u8mf8_tu() argument
16 return __riscv_vnsrl_tu(maskedoff, op1, shift, vl); in test_vnsrl_wv_u8mf8_tu()
25 vuint8mf8_t test_vnsrl_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl… in test_vnsrl_wx_u8mf8_tu() argument
26 return __riscv_vnsrl_tu(maskedoff, op1, shift, vl); in test_vnsrl_wx_u8mf8_tu()
35 vuint8mf4_t test_vnsrl_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size… in test_vnsrl_wv_u8mf4_tu() argument
36 return __riscv_vnsrl_tu(maskedoff, op1, shift, vl); in test_vnsrl_wv_u8mf4_tu()
45 vuint8mf4_t test_vnsrl_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl… in test_vnsrl_wx_u8mf4_tu() argument
46 return __riscv_vnsrl_tu(maskedoff, op1, shift, vl); in test_vnsrl_wx_u8mf4_tu()
55 vuint8mf2_t test_vnsrl_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_… in test_vnsrl_wv_u8mf2_tu() argument
56 return __riscv_vnsrl_tu(maskedoff, op1, shift, vl); in test_vnsrl_wv_u8mf2_tu()
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| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/ |
| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl… in test_vsll_vv_i8mf8_tu() argument
16 return __riscv_vsll_vv_i8mf8_tu(maskedoff, op1, shift, vl); in test_vsll_vv_i8mf8_tu()
25 vint8mf8_t test_vsll_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8_tu() argument
26 return __riscv_vsll_vx_i8mf8_tu(maskedoff, op1, shift, vl); in test_vsll_vx_i8mf8_tu()
35 vint8mf4_t test_vsll_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl… in test_vsll_vv_i8mf4_tu() argument
36 return __riscv_vsll_vv_i8mf4_tu(maskedoff, op1, shift, vl); in test_vsll_vv_i8mf4_tu()
45 vint8mf4_t test_vsll_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4_tu() argument
46 return __riscv_vsll_vx_i8mf4_tu(maskedoff, op1, shift, vl); in test_vsll_vx_i8mf4_tu()
55 vint8mf2_t test_vsll_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl… in test_vsll_vv_i8mf2_tu() argument
56 return __riscv_vsll_vv_i8mf2_tu(maskedoff, op1, shift, vl); in test_vsll_vv_i8mf2_tu()
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| H A D | vsrl.c | 15 vuint8mf8_t test_vsrl_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t… in test_vsrl_vv_u8mf8_tu() argument
16 return __riscv_vsrl_vv_u8mf8_tu(maskedoff, op1, shift, vl); in test_vsrl_vv_u8mf8_tu()
25 vuint8mf8_t test_vsrl_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8_tu() argument
26 return __riscv_vsrl_vx_u8mf8_tu(maskedoff, op1, shift, vl); in test_vsrl_vx_u8mf8_tu()
35 vuint8mf4_t test_vsrl_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t… in test_vsrl_vv_u8mf4_tu() argument
36 return __riscv_vsrl_vv_u8mf4_tu(maskedoff, op1, shift, vl); in test_vsrl_vv_u8mf4_tu()
45 vuint8mf4_t test_vsrl_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4_tu() argument
46 return __riscv_vsrl_vx_u8mf4_tu(maskedoff, op1, shift, vl); in test_vsrl_vx_u8mf4_tu()
55 vuint8mf2_t test_vsrl_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t… in test_vsrl_vv_u8mf2_tu() argument
56 return __riscv_vsrl_vv_u8mf2_tu(maskedoff, op1, shift, vl); in test_vsrl_vv_u8mf2_tu()
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| H A D | vsra.c | 15 vint8mf8_t test_vsra_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl… in test_vsra_vv_i8mf8_tu() argument
16 return __riscv_vsra_vv_i8mf8_tu(maskedoff, op1, shift, vl); in test_vsra_vv_i8mf8_tu()
25 vint8mf8_t test_vsra_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8_tu() argument
26 return __riscv_vsra_vx_i8mf8_tu(maskedoff, op1, shift, vl); in test_vsra_vx_i8mf8_tu()
35 vint8mf4_t test_vsra_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl… in test_vsra_vv_i8mf4_tu() argument
36 return __riscv_vsra_vv_i8mf4_tu(maskedoff, op1, shift, vl); in test_vsra_vv_i8mf4_tu()
45 vint8mf4_t test_vsra_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4_tu() argument
46 return __riscv_vsra_vx_i8mf4_tu(maskedoff, op1, shift, vl); in test_vsra_vx_i8mf4_tu()
55 vint8mf2_t test_vsra_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl… in test_vsra_vv_i8mf2_tu() argument
56 return __riscv_vsra_vv_i8mf2_tu(maskedoff, op1, shift, vl); in test_vsra_vv_i8mf2_tu()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size… in test_vnsrl_wv_u8mf8_tu() argument
16 return __riscv_vnsrl_wv_u8mf8_tu(maskedoff, op1, shift, vl); in test_vnsrl_wv_u8mf8_tu()
25 vuint8mf8_t test_vnsrl_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl… in test_vnsrl_wx_u8mf8_tu() argument
26 return __riscv_vnsrl_wx_u8mf8_tu(maskedoff, op1, shift, vl); in test_vnsrl_wx_u8mf8_tu()
35 vuint8mf4_t test_vnsrl_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size… in test_vnsrl_wv_u8mf4_tu() argument
36 return __riscv_vnsrl_wv_u8mf4_tu(maskedoff, op1, shift, vl); in test_vnsrl_wv_u8mf4_tu()
45 vuint8mf4_t test_vnsrl_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl… in test_vnsrl_wx_u8mf4_tu() argument
46 return __riscv_vnsrl_wx_u8mf4_tu(maskedoff, op1, shift, vl); in test_vnsrl_wx_u8mf4_tu()
55 vuint8mf2_t test_vnsrl_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_… in test_vnsrl_wv_u8mf2_tu() argument
56 return __riscv_vnsrl_wv_u8mf2_tu(maskedoff, op1, shift, vl); in test_vnsrl_wv_u8mf2_tu()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t … in test_vnsra_wv_i8mf8_tu() argument
16 return __riscv_vnsra_wv_i8mf8_tu(maskedoff, op1, shift, vl); in test_vnsra_wv_i8mf8_tu()
25 vint8mf8_t test_vnsra_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8_tu() argument
26 return __riscv_vnsra_wx_i8mf8_tu(maskedoff, op1, shift, vl); in test_vnsra_wx_i8mf8_tu()
35 vint8mf4_t test_vnsra_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t … in test_vnsra_wv_i8mf4_tu() argument
36 return __riscv_vnsra_wv_i8mf4_tu(maskedoff, op1, shift, vl); in test_vnsra_wv_i8mf4_tu()
45 vint8mf4_t test_vnsra_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4_tu() argument
46 return __riscv_vnsra_wx_i8mf4_tu(maskedoff, op1, shift, vl); in test_vnsra_wx_i8mf4_tu()
55 vint8mf2_t test_vnsra_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t v… in test_vnsra_wv_i8mf2_tu() argument
56 return __riscv_vnsra_wv_i8mf2_tu(maskedoff, op1, shift, vl); in test_vnsra_wv_i8mf2_tu()
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| /llvm-project/compiler-rt/test/ubsan/TestCases/Integer/ |
| H A D | unsigned-shift.cpp | 4 #define shift(val, amount) ({ \ macro
13 shift(0b00000000'00000000'00000000'00000000, 31); in main()
14 shift(0b00000000'00000000'00000000'00000001, 31); in main()
15 …shift(0b00000000'00000000'00000000'00000010, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
16 …shift(0b00000000'00000000'00000000'00000100, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
17 …shift(0b00000000'00000000'00000000'00001000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
18 …shift(0b00000000'00000000'00000000'00010000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
19 …shift(0b00000000'00000000'00000000'00100000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
20 …shift(0b00000000'00000000'00000000'01000000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
21 …shift(0b00000000'00000000'00000000'10000000, 31); // CHECK: unsigned-shift.cpp:[[@LINE]]:3: runtim… in main()
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