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/llvm-project/llvm/test/MC/AMDGPU/
H A Dgfx9_asm_flat.s3 flat_load_ubyte v5, v[1:2] offset:4095
6 flat_load_ubyte v255, v[1:2] offset:4095
9 flat_load_ubyte v5, v[254:255] offset:4095
15 flat_load_ubyte v5, v[1:2] offset:0
18 flat_load_ubyte v5, v[1:2] offset:7
21 flat_load_ubyte v5, v[1:2] offset:4095 glc
24 flat_load_ubyte v5, v[1:2] offset:4095 slc
27 flat_load_sbyte v5, v[1:2] offset:4095
30 flat_load_sbyte v255, v[1:2] offset:4095
33 flat_load_sbyte v5, v[254:255] offset:4095
[all …]
H A Dgfx7_asm_ds.s3 ds_add_u32 v1, v2 offset:65535
6 ds_add_u32 v255, v2 offset:65535
9 ds_add_u32 v1, v255 offset:65535
15 ds_add_u32 v1, v2 offset:0
18 ds_add_u32 v1, v2 offset:4
21 ds_add_u32 v1, v2 offset:65535 gds
24 ds_sub_u32 v1, v2 offset:65535
27 ds_sub_u32 v255, v2 offset:65535
30 ds_sub_u32 v1, v255 offset:65535
36 ds_sub_u32 v1, v2 offset:0
[all …]
H A Dgfx9_asm_ds.s3 ds_add_u32 v1, v2 offset:65535
6 ds_add_u32 v255, v2 offset:65535
9 ds_add_u32 v1, v255 offset:65535
15 ds_add_u32 v1, v2 offset:0
18 ds_add_u32 v1, v2 offset:4
21 ds_add_u32 v1, v2 offset:65535 gds
24 ds_sub_u32 v1, v2 offset:65535
27 ds_sub_u32 v255, v2 offset:65535
30 ds_sub_u32 v1, v255 offset:65535
36 ds_sub_u32 v1, v2 offset:0
[all …]
H A Dgfx9_asm_mubuf.s3 buffer_load_format_x v5, off, s[8:11], s3 offset:4095
6 buffer_load_format_x v255, off, s[8:11], s3 offset:4095
9 buffer_load_format_x v5, off, s[12:15], s3 offset:4095
12 buffer_load_format_x v5, off, s[96:99], s3 offset:4095
15 buffer_load_format_x v5, off, ttmp[12:15], s3 offset:4095
18 buffer_load_format_x v5, off, s[8:11], s101 offset:4095
21 buffer_load_format_x v5, off, s[8:11], flat_scratch_lo offset:4095
24 buffer_load_format_x v5, off, s[8:11], flat_scratch_hi offset:4095
27 buffer_load_format_x v5, off, s[8:11], vcc_lo offset:4095
30 buffer_load_format_x v5, off, s[8:11], vcc_hi offset:4095
[all …]
H A Dgfx8_asm_mubuf.s3 buffer_load_format_x v5, off, s[8:11], s3 offset:4095
6 buffer_load_format_x v255, off, s[8:11], s3 offset:4095
9 buffer_load_format_x v5, off, s[12:15], s3 offset:4095
12 buffer_load_format_x v5, off, s[96:99], s3 offset:4095
15 buffer_load_format_x v5, off, ttmp[8:11], s3 offset:4095
18 buffer_load_format_x v5, off, s[8:11], s101 offset:4095
21 buffer_load_format_x v5, off, s[8:11], flat_scratch_lo offset:4095
24 buffer_load_format_x v5, off, s[8:11], flat_scratch_hi offset:4095
27 buffer_load_format_x v5, off, s[8:11], vcc_lo offset:4095
30 buffer_load_format_x v5, off, s[8:11], vcc_hi offset:4095
[all …]
H A Dgfx12_asm_vflat.s3 flat_atomic_add_f32 v1, v[0:1], v2 offset:-8000000 th:TH_ATOMIC_RETURN
6 flat_atomic_add_f32 v1, v[0:1], v2 offset:8000000 th:TH_ATOMIC_RETURN
9 flat_atomic_add_f32 v1, v[0:1], v2 offset:-64 th:TH_ATOMIC_RETURN
12 flat_atomic_add_f32 v1, v[0:1], v2 offset:64 th:TH_ATOMIC_RETURN
15 flat_atomic_add_f32 v[0:1], v2 offset:-64
18 flat_atomic_add_f32 v[0:1], v2 offset:64
21 flat_atomic_add_u32 v1, v[0:1], v2 offset:-64 th:TH_ATOMIC_RETURN
24 flat_atomic_add_u32 v1, v[0:1], v2 offset:64 th:TH_ATOMIC_RETURN
27 flat_atomic_add_u32 v[0:1], v2 offset:-64
30 flat_atomic_add_u32 v[0:1], v2 offset:64
[all …]
H A Dgfx7_asm_mubuf.s3 buffer_load_format_x v5, off, s[8:11], s3 offset:4095
6 buffer_load_format_x v255, off, s[8:11], s3 offset:4095
9 buffer_load_format_x v5, off, s[12:15], s3 offset:4095
12 buffer_load_format_x v5, off, s[100:103], s3 offset:4095
15 buffer_load_format_x v5, off, ttmp[8:11], s3 offset:4095
18 buffer_load_format_x v5, off, s[8:11], s103 offset:4095
21 buffer_load_format_x v5, off, s[8:11], flat_scratch_lo offset:4095
24 buffer_load_format_x v5, off, s[8:11], flat_scratch_hi offset:4095
27 buffer_load_format_x v5, off, s[8:11], vcc_lo offset:4095
30 buffer_load_format_x v5, off, s[8:11], vcc_hi offset:4095
[all …]
H A Dgfx11_asm_mubuf.s10 buffer_load_b32 v5, off, s[8:11], s3 offset:4095
13 buffer_load_b32 v255, off, s[8:11], s3 offset:4095
16 buffer_load_b32 v5, off, s[12:15], s3 offset:4095
19 buffer_load_b32 v5, off, s[96:99], s3 offset:4095
22 buffer_load_b32 v5, off, s[8:11], s101 offset:4095
25 buffer_load_b32 v5, off, s[8:11], m0 offset:4095
28 buffer_load_b32 v5, off, s[8:11], 0 offset:4095
31 buffer_load_b32 v5, off, s[8:11], -1 offset:4095
34 buffer_load_b32 v5, off, s[8:11], 0.5 offset:4095
37 buffer_load_b32 v5, off, s[8:11], -4.0 offset:4095
[all …]
H A Dgfx8_asm_ds.s3 ds_add_u32 v1, v2 offset:65535
6 ds_add_u32 v255, v2 offset:65535
9 ds_add_u32 v1, v255 offset:65535
15 ds_add_u32 v1, v2 offset:0
18 ds_add_u32 v1, v2 offset:4
21 ds_add_u32 v1, v2 offset:65535 gds
24 ds_sub_u32 v1, v2 offset:65535
27 ds_sub_u32 v255, v2 offset:65535
30 ds_sub_u32 v1, v255 offset:65535
36 ds_sub_u32 v1, v2 offset:0
[all …]
H A Dgfx10_asm_ds.s20 ds_add_u32 v0, v1 offset:0
23 ds_add_u32 v255, v254 offset:0
26 ds_add_u32 v0, v254 offset:0
29 ds_add_u32 v255, v1 offset:0
32 ds_add_u32 v0, v1 offset:4660
35 ds_add_u32 v255, v254 offset:4660
38 ds_add_u32 v0, v254 offset:4660
41 ds_add_u32 v255, v1 offset:4660
44 ds_add_u32 v0, v1 offset:65535
47 ds_add_u32 v255, v254 offset
[all...]
H A Dgfx8_asm_mtbuf.s3 tbuffer_load_format_x v5, off, s[8:11], s3 offset:4095
6 tbuffer_load_format_x v255, off, s[8:11], s3 offset:4095
9 tbuffer_load_format_x v5, off, s[12:15], s3 offset:4095
12 tbuffer_load_format_x v5, off, s[96:99], s3 offset:4095
15 tbuffer_load_format_x v5, off, ttmp[8:11], s3 offset:4095
18 tbuffer_load_format_x v5, off, s[8:11], s101 offset:4095
21 tbuffer_load_format_x v5, off, s[8:11], flat_scratch_lo offset:4095
24 tbuffer_load_format_x v5, off, s[8:11], flat_scratch_hi offset:4095
27 tbuffer_load_format_x v5, off, s[8:11], vcc_lo offset:4095
30 tbuffer_load_format_x v5, off, s[8:11], vcc_hi offset:4095
[all …]
H A Dgfx12_asm_vbuffer_mubuf.s4 buffer_load_b32 v5, off, s[8:11], s3 offset:8388607
7 buffer_load_b32 v255, off, s[8:11], s3 offset:8388607
10 buffer_load_b32 v5, off, s[12:15], s3 offset:8388607
13 buffer_load_b32 v5, off, s[96:99], s3 offset:8388607
16 buffer_load_b32 v5, off, s[8:11], s101 offset:8388607
19 buffer_load_b32 v5, off, s[8:11], m0 offset:8388607
22 buffer_load_b32 v5, off, s[8:11], 0 offset:8388607
25 buffer_load_b32 v5, off, s[8:11], -1 offset:8388607
28 buffer_load_b32 v5, off, s[8:11], 0.5 offset:8388607
31 buffer_load_b32 v5, off, s[8:11], -4.0 offset
[all...]
H A Dgfx10_asm_mubuf.s23 buffer_load_format_x v5, off, s[8:11], s3 offset:4095
26 buffer_load_format_x v255, off, s[8:11], s3 offset:4095
29 buffer_load_format_x v5, off, s[12:15], s3 offset:4095
32 buffer_load_format_x v5, off, s[96:99], s3 offset:4095
35 buffer_load_format_x v5, off, s[8:11], s101 offset:4095
38 buffer_load_format_x v5, off, s[8:11], m0 offset:4095
41 buffer_load_format_x v5, off, s[8:11], 0 offset:4095
44 buffer_load_format_x v5, off, s[8:11], -1 offset:4095
47 buffer_load_format_x v5, off, s[8:11], 0.5 offset:4095
50 buffer_load_format_x v5, off, s[8:11], -4.0 offset
[all...]
H A Dgfx12_asm_ds.s9 ds_add_f32 v1, v2 offset:65535
12 ds_add_f32 v1, v2 offset:0
15 ds_add_f32 v255, v255 offset:4
21 ds_add_rtn_f32 v5, v1, v2 offset:65535
24 ds_add_rtn_f32 v5, v1, v2 offset:0
27 ds_add_rtn_f32 v255, v255, v255 offset:4
33 ds_add_rtn_u32 v5, v1, v2 offset:65535
36 ds_add_rtn_u32 v5, v1, v2 offset:0
39 ds_add_rtn_u32 v255, v255, v255 offset:4
45 ds_add_rtn_u64 v[5:6], v1, v[2:3] offset
[all...]
H A Dgfx9_asm_mtbuf.s3 tbuffer_load_format_x v5, off, s[8:11], s3 offset:4095
6 tbuffer_load_format_x v255, off, s[8:11], s3 offset:4095
9 tbuffer_load_format_x v5, off, s[12:15], s3 offset:4095
12 tbuffer_load_format_x v5, off, s[96:99], s3 offset:4095
15 tbuffer_load_format_x v5, off, ttmp[12:15], s3 offset:4095
18 tbuffer_load_format_x v5, off, s[8:11], s101 offset:4095
21 tbuffer_load_format_x v5, off, s[8:11], flat_scratch_lo offset:4095
24 tbuffer_load_format_x v5, off, s[8:11], flat_scratch_hi offset:4095
27 tbuffer_load_format_x v5, off, s[8:11], vcc_lo offset:4095
30 tbuffer_load_format_x v5, off, s[8:11], vcc_hi offset:4095
[all …]
H A Dgfx90a_ldst_acc.s4 // GFX90A: flat_load_ubyte a5, v[2:3] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x02,0x00,0x80,0x05]
6 flat_load_ubyte a5, v[2:3] offset:4095
8 // GFX90A: flat_load_ubyte a255, v[2:3] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x02,0x00,0x80,0xff]
10 flat_load_ubyte a255, v[2:3] offset:4095
12 // GFX90A: flat_load_ubyte a5, v[254:255] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0xfe,0x00,0x80,0x05]
14 flat_load_ubyte a5, v[254:255] offset:4095
24 // GFX90A: flat_load_ubyte a5, v[2:3] offset:7 ; encoding: [0x07,0x00,0x40,0xdc,0x02,0x00,0x80,0x05]
26 flat_load_ubyte a5, v[2:3] offset:7
28 // GFX90A: flat_load_ubyte a5, v[2:3] offset:4095 glc ; encoding: [0xff,0x0f,0x41,0xdc,0x02,0x00,0x80,0x05]
30 flat_load_ubyte a5, v[2:3] offset
[all...]
H A Dgfx11_asm_ds.s9 ds_add_f32 v1, v2 offset:65535
12 ds_add_f32 v1, v2 offset:0
15 ds_add_f32 v255, v255 offset:4 gds
21 ds_add_gs_reg_rtn v[5:6], v1 offset:65535 gds
24 ds_add_gs_reg_rtn v[5:6], v1 offset:0 gds
27 ds_add_gs_reg_rtn v[254:255], v255 offset:4 gds
33 ds_add_rtn_f32 v5, v1, v2 offset:65535
36 ds_add_rtn_f32 v5, v1, v2 offset:0
39 ds_add_rtn_f32 v255, v255, v255 offset:4 gds
45 ds_add_rtn_u32 v5, v1, v2 offset:65535
[all …]
H A Dgfx7_asm_mtbuf.s3 tbuffer_load_format_x v5, off, s[8:11], s3 offset:4095
6 tbuffer_load_format_x v255, off, s[8:11], s3 offset:4095
9 tbuffer_load_format_x v5, off, s[12:15], s3 offset:4095
12 tbuffer_load_format_x v5, off, s[100:103], s3 offset:4095
15 tbuffer_load_format_x v5, off, ttmp[8:11], s3 offset:4095
18 tbuffer_load_format_x v5, off, s[8:11], s103 offset:4095
21 tbuffer_load_format_x v5, off, s[8:11], flat_scratch_lo offset:4095
24 tbuffer_load_format_x v5, off, s[8:11], flat_scratch_hi offset:4095
27 tbuffer_load_format_x v5, off, s[8:11], vcc_lo offset:4095
30 tbuffer_load_format_x v5, off, s[8:11], vcc_hi offset:4095
[all …]
/llvm-project/lldb/unittests/Utility/
H A DDataExtractorTest.cpp21 lldb::offset_t offset; in TEST() local
23 offset = 0; in TEST()
24 ASSERT_EQ(buffer[1], LE.GetMaxU64Bitfield(&offset, sizeof(buffer), 8, 8)); in TEST()
25 offset = 0; in TEST()
26 ASSERT_EQ(buffer[1], BE.GetMaxU64Bitfield(&offset, sizeof(buffer), 8, 8)); in TEST()
27 offset = 0; in TEST()
29 LE.GetMaxU64Bitfield(&offset, sizeof(buffer), 64, 0)); in TEST()
30 offset = 0; in TEST()
32 BE.GetMaxU64Bitfield(&offset, sizeof(buffer), 64, 0)); in TEST()
33 offset = 0; in TEST()
[all …]
/llvm-project/flang/test/Lower/PowerPC/
H A Dppc-pwr10-vec-intrinsics.f908 subroutine mma_lxvp_test_i2(v1, offset, vp) argument
10 integer(2) :: offset local
13 vp = mma_lxvp(offset, v1)
52 subroutine vec_lxvp_test_i2(v1, offset, vp) argument
53 integer(2) :: offset local
56 vp = vec_lxvp(offset, v1)
65 subroutine vec_lxvp_test_i4(v1, offset, vp) argument
66 integer(2) :: offset local
69 vp = vec_lxvp(offset, v1)
78 subroutine vec_lxvp_test_u2(v1, offset, vp) argument
[all …]
/llvm-project/clang/test/CodeGen/arm-mve-intrinsics/
H A Dscatter-gather.c14 int16x8_t test_vldrbq_gather_offset_s16(const int8_t *base, uint16x8_t offset) in test_vldrbq_gather_offset_s16() argument
17 return vldrbq_gather_offset(base, offset); in test_vldrbq_gather_offset_s16()
19 return vldrbq_gather_offset_s16(base, offset); in test_vldrbq_gather_offset_s16()
28 int32x4_t test_vldrbq_gather_offset_s32(const int8_t *base, uint32x4_t offset) in test_vldrbq_gather_offset_s32() argument
31 return vldrbq_gather_offset(base, offset); in test_vldrbq_gather_offset_s32()
33 return vldrbq_gather_offset_s32(base, offset); in test_vldrbq_gather_offset_s32()
42 int8x16_t test_vldrbq_gather_offset_s8(const int8_t *base, uint8x16_t offset) in test_vldrbq_gather_offset_s8() argument
45 return vldrbq_gather_offset(base, offset); in test_vldrbq_gather_offset_s8()
47 return vldrbq_gather_offset_s8(base, offset); in test_vldrbq_gather_offset_s8()
56 uint16x8_t test_vldrbq_gather_offset_u16(const uint8_t *base, uint16x8_t offset) in test_vldrbq_gather_offset_u16() argument
[all …]
/llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/
H A Dvslidedown.c16 vfloat16mf4_t test_vslidedown_vx_f16mf4(vfloat16mf4_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16mf4() argument
17 return __riscv_vslidedown(src, offset, vl); in test_vslidedown_vx_f16mf4()
26 vfloat16mf2_t test_vslidedown_vx_f16mf2(vfloat16mf2_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16mf2() argument
27 return __riscv_vslidedown(src, offset, vl); in test_vslidedown_vx_f16mf2()
36 vfloat16m1_t test_vslidedown_vx_f16m1(vfloat16m1_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16m1() argument
37 return __riscv_vslidedown(src, offset, vl); in test_vslidedown_vx_f16m1()
46 vfloat16m2_t test_vslidedown_vx_f16m2(vfloat16m2_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16m2() argument
47 return __riscv_vslidedown(src, offset, vl); in test_vslidedown_vx_f16m2()
56 vfloat16m4_t test_vslidedown_vx_f16m4(vfloat16m4_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16m4() argument
57 return __riscv_vslidedown(src, offset, vl); in test_vslidedown_vx_f16m4()
[all …]
/llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/
H A Dvslidedown.c16 vfloat16mf4_t test_vslidedown_vx_f16mf4(vfloat16mf4_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16mf4() argument
17 return __riscv_vslidedown_vx_f16mf4(src, offset, vl); in test_vslidedown_vx_f16mf4()
26 vfloat16mf2_t test_vslidedown_vx_f16mf2(vfloat16mf2_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16mf2() argument
27 return __riscv_vslidedown_vx_f16mf2(src, offset, vl); in test_vslidedown_vx_f16mf2()
36 vfloat16m1_t test_vslidedown_vx_f16m1(vfloat16m1_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16m1() argument
37 return __riscv_vslidedown_vx_f16m1(src, offset, vl); in test_vslidedown_vx_f16m1()
46 vfloat16m2_t test_vslidedown_vx_f16m2(vfloat16m2_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16m2() argument
47 return __riscv_vslidedown_vx_f16m2(src, offset, vl); in test_vslidedown_vx_f16m2()
56 vfloat16m4_t test_vslidedown_vx_f16m4(vfloat16m4_t src, size_t offset, size_t vl) { in test_vslidedown_vx_f16m4() argument
57 return __riscv_vslidedown_vx_f16m4(src, offset, vl); in test_vslidedown_vx_f16m4()
[all …]
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dmemcpy-libcall.ll15 ; CHECK-NEXT: flat_load_ubyte v13, v[11:12] offset:46
16 ; CHECK-NEXT: flat_load_ushort v14, v[11:12] offset:44
17 ; CHECK-NEXT: flat_load_dwordx3 v[8:10], v[11:12] offset:32
18 ; CHECK-NEXT: flat_load_dwordx4 v[0:3], v[11:12] offset:16
23 ; CHECK-NEXT: flat_store_byte v[11:12], v13 offset:46
24 ; CHECK-NEXT: flat_store_short v[11:12], v14 offset:44
25 ; CHECK-NEXT: flat_store_dwordx3 v[11:12], v[8:10] offset:32
26 ; CHECK-NEXT: flat_store_dwordx4 v[11:12], v[0:3] offset:16
40 ; CHECK-NEXT: global_load_dwordx2 v[8:9], v12, s[2:3] offset:32
41 ; CHECK-NEXT: global_load_dwordx2 v[10:11], v12, s[2:3] offset
[all...]
/llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/
H A Dvslideup.c16 vfloat16mf4_t test_vslideup_vx_f16mf4_tu(vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size… in test_vslideup_vx_f16mf4_tu() argument
17 return __riscv_vslideup_vx_f16mf4_tu(dest, src, offset, vl); in test_vslideup_vx_f16mf4_tu()
26 vfloat16mf2_t test_vslideup_vx_f16mf2_tu(vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size… in test_vslideup_vx_f16mf2_tu() argument
27 return __riscv_vslideup_vx_f16mf2_tu(dest, src, offset, vl); in test_vslideup_vx_f16mf2_tu()
36 vfloat16m1_t test_vslideup_vx_f16m1_tu(vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t v… in test_vslideup_vx_f16m1_tu() argument
37 return __riscv_vslideup_vx_f16m1_tu(dest, src, offset, vl); in test_vslideup_vx_f16m1_tu()
46 vfloat16m2_t test_vslideup_vx_f16m2_tu(vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t v… in test_vslideup_vx_f16m2_tu() argument
47 return __riscv_vslideup_vx_f16m2_tu(dest, src, offset, vl); in test_vslideup_vx_f16m2_tu()
56 vfloat16m4_t test_vslideup_vx_f16m4_tu(vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t v… in test_vslideup_vx_f16m4_tu() argument
57 return __riscv_vslideup_vx_f16m4_tu(dest, src, offset, vl); in test_vslideup_vx_f16m4_tu()
[all …]

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