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/llvm-project/libcxx/test/std/utilities/charconv/charconv.msvc/
H A Ddouble_fixed_precision_to_chars_test_cases_3.hpp51 {0x0.63b831e8bd9d7p-1022, chars_format::fixed, 1074,
64 {0x1.8777195166b0cp-1022, chars_format::fixed, 1072,
77 {0x1.4668b84fe57a0p-1021, chars_format::fixed, 1068,
90 {0x1.befe59a615135p-1020, chars_format::fixed, 1072,
103 {0x1.1e3d1ff2f0c7dp-1019, chars_format::fixed, 1071,
116 {0x1.6f434a1f8b19bp-1018, chars_format::fixed, 1070,
129 {0x1.587345c18153ep-1017, chars_format::fixed, 1068,
142 {0x1.f1b6b87277fdep-1016, chars_format::fixed, 1067,
155 {0x1.72a498409980ap-1015, chars_format::fixed, 1066,
168 {0x1.ce91e910d066ap-1014, chars_format::fixed, 1065,
[all …]
H A Ddouble_fixed_precision_to_chars_test_cases_4.hpp14 {0x0.fffffffffffffp-1022, chars_format::fixed, 1074,
27 {0x1.fffffffffffffp-1022, chars_format::fixed, 1074,
40 {0x1.fffffffffffffp-1021, chars_format::fixed, 1073,
53 {0x1.fffffffffffffp-1020, chars_format::fixed, 1072,
66 {0x1.fffffffffffffp-1019, chars_format::fixed, 1071,
79 {0x1.fffffffffffffp-1018, chars_format::fixed, 1070,
92 {0x1.fffffffffffffp-1017, chars_format::fixed, 1069,
105 {0x1.fffffffffffffp-1016, chars_format::fixed, 1068,
118 {0x1.fffffffffffffp-1015, chars_format::fixed, 1067,
131 {0x1.fffffffffffffp-1014, chars_format::fixed, 1066,
[all …]
H A Dfloat_fixed_precision_to_chars_test_cases.hpp49 {0.0f, chars_format::fixed, 4, "0.0000"},
50 {-0.0f, chars_format::fixed, 4, "-0.0000"},
51 {float_inf, chars_format::fixed, 4, "inf"},
52 {-float_inf, chars_format::fixed, 4, "-inf"},
53 {float_nan, chars_format::fixed, 4, "nan"},
54 {-float_nan, chars_format::fixed, 4, "-nan(ind)"},
55 {float_nan_payload, chars_format::fixed, 4, "nan"},
56 {-float_nan_payload, chars_format::fixed, 4, "-nan"},
57 {1.729f, chars_format::fixed, 4, "1.7290"},
58 {-1.729f, chars_format::fixed, 4, "-1.7290"},
[all …]
H A Ddouble_fixed_precision_to_chars_test_cases_2.hpp50 {1e-323, chars_format::fixed, 1073,
63 {1e-322, chars_format::fixed, 1072,
76 {1e-321, chars_format::fixed, 1073,
89 {1e-320, chars_format::fixed, 1071,
102 {1e-319, chars_format::fixed, 1070,
115 {1e-318, chars_format::fixed, 1073,
128 {1e-317, chars_format::fixed, 1074,
141 {1e-316, chars_format::fixed, 1074,
154 {1e-315, chars_format::fixed, 1074,
167 {1e-314, chars_format::fixed, 1074,
[all …]
H A Ddouble_fixed_precision_to_chars_test_cases_1.hpp49 {0.0, chars_format::fixed, 4, "0.0000"},
50 {-0.0, chars_format::fixed, 4, "-0.0000"},
51 {double_inf, chars_format::fixed, 4, "inf"},
52 {-double_inf, chars_format::fixed, 4, "-inf"},
53 {double_nan, chars_format::fixed, 4, "nan"},
54 {-double_nan, chars_format::fixed, 4, "-nan(ind)"},
55 {double_nan_payload, chars_format::fixed, 4, "nan"},
56 {-double_nan_payload, chars_format::fixed, 4, "-nan"},
57 {1.729, chars_format::fixed, 4, "1.7290"},
58 {-1.729, chars_format::fixed, 4, "-1.7290"},
[all …]
H A Ddouble_to_chars_test_cases.hpp61 {0.0, chars_format::fixed, "0"},
62 {-0.0, chars_format::fixed, "-0"},
63 {double_inf, chars_format::fixed, "inf"},
64 {-double_inf, chars_format::fixed, "-inf"},
65 {double_nan, chars_format::fixed, "nan"},
66 {-double_nan, chars_format::fixed, "-nan(ind)"},
67 {double_nan_payload, chars_format::fixed, "nan"},
68 {-double_nan_payload, chars_format::fixed, "-nan"},
69 {2.018, chars_format::fixed, "2.018"},
70 {-2.018, chars_format::fixed, "-2.018"},
[all …]
H A Ddouble_from_chars_test_cases.hpp201 chars_format::fixed, 1080, errc::result_out_of_range, 0x0.0000000000000p+0},
215 chars_format::fixed, 1077, errc::result_out_of_range, 0x0.0000000000000p+0},
239 chars_format::fixed, 2077, errc::result_out_of_range, 0x0.0000000000000p+0},
263 chars_format::fixed, 2078, errc{}, 0x0.0000000000001p-1022},
277 chars_format::fixed, 1078, errc{}, 0x0.0000000000001p-1022},
291 chars_format::fixed, 1077, errc{}, 0x0.0000000000001p-1022},
305 chars_format::fixed, 1080, errc{}, 0x0.ffffffffffffep-1022},
319 chars_format::fixed, 1077, errc{}, 0x0.ffffffffffffep-1022},
343 chars_format::fixed, 2077, errc{}, 0x0.ffffffffffffep-1022},
367 chars_format::fixed, 2078, errc{}, 0x0.fffffffffffffp-1022},
[all …]
H A Dfloat_to_chars_test_cases.hpp61 {0.0f, chars_format::fixed, "0"},
62 {-0.0f, chars_format::fixed, "-0"},
63 {float_inf, chars_format::fixed, "inf"},
64 {-float_inf, chars_format::fixed, "-inf"},
65 {float_nan, chars_format::fixed, "nan"},
66 {-float_nan, chars_format::fixed, "-nan(ind)"},
67 {float_nan_payload, chars_format::fixed, "nan"},
68 {-float_nan_payload, chars_format::fixed, "-nan"},
69 {2.018f, chars_format::fixed, "2.018"},
70 {-2.018f, chars_format::fixed, "-2.018"},
[all …]
/llvm-project/clang/test/CodeGen/
H A Darm64-abi-vector.c19 double varargs_vec_2c(int fixed, ...) { in varargs_vec_2c() argument
24 double sum = fixed; in varargs_vec_2c()
25 va_start(ap, fixed); in varargs_vec_2c()
37 double varargs_vec_3c(int fixed, ...) { in varargs_vec_3c() argument
42 double sum = fixed; in varargs_vec_3c()
43 va_start(ap, fixed); in varargs_vec_3c()
56 double varargs_vec_4c(int fixed, ...) { in varargs_vec_4c() argument
61 double sum = fixed; in varargs_vec_4c()
62 va_start(ap, fixed); in varargs_vec_4c()
75 double varargs_vec_5c(int fixed, ...) { in varargs_vec_5c() argument
[all …]
H A Darm-abi-vector.c16 double varargs_vec_2i(int fixed, ...) { in varargs_vec_2i() argument
36 double sum = fixed; in varargs_vec_2i()
37 va_start(ap, fixed); in varargs_vec_2i()
54 double varargs_vec_3c(int fixed, ...) { in varargs_vec_3c() argument
65 double sum = fixed; in varargs_vec_3c()
66 va_start(ap, fixed); in varargs_vec_3c()
83 double varargs_vec_5c(int fixed, ...) { in varargs_vec_5c() argument
103 double sum = fixed; in varargs_vec_5c()
104 va_start(ap, fixed); in varargs_vec_5c()
121 double varargs_vec_9c(int fixed, ...) { in varargs_vec_9c() argument
[all …]
/llvm-project/llvm/test/CodeGen/PowerPC/
H A Daix-cc-byval-split.ll39 ; CHECK32: renamable $r[[REG1:[0-9]+]] = LWZ 84, %fixed-stack.0
40 ; CHECK32-DAG: STW killed renamable $r3, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0
41 ; CHECK32-DAG: STW killed renamable $r4, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4
42 ; CHECK32: renamable $r[[REG2:[0-9]+]] = LWZ 80, %fixed-stack.0
43 ; CHECK32-DAG: STW killed renamable $r5, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8
44 ; CHECK32-DAG: STW killed renamable $r6, 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12
45 ; CHECK32-DAG: STW renamable $r7, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16
46 ; CHECK32-DAG: STW renamable $r8, 20, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 20
47 ; CHECK32-DAG: STW killed renamable $r9, 24, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 24
50 ; CHECK32 STW killed renamable $r10, 28, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + …
[all …]
H A Daix-csr-vector.ll77 ; MIR32-DAG: STW killed $r25, -116, $r1 :: (store (s32) into %fixed-stack.17)
78 ; MIR32-DAG: STW killed $r26, -112, $r1 :: (store (s32) into %fixed-stack.16, align 8)
79 ; MIR32-DAG: STW killed $r27, -108, $r1 :: (store (s32) into %fixed-stack.15)
80 ; MIR32-DAG: STW killed $r28, -104, $r1 :: (store (s32) into %fixed-stack.14, align 16)
81 ; MIR32-DAG: STW killed $r29, -100, $r1 :: (store (s32) into %fixed-stack.13)
82 ; MIR32-DAG: STW killed $r30, -96, $r1 :: (store (s32) into %fixed-stack.12, align 8)
83 ; MIR32-DAG: STW killed $r31, -92, $r1 :: (store (s32) into %fixed-stack.11)
84 ; MIR32-DAG: STFD killed $f21, -88, $r1 :: (store (s64) into %fixed-stack.10)
85 ; MIR32-DAG: STFD killed $f22, -80, $r1 :: (store (s64) into %fixed-stack.9, align 16)
86 ; MIR32-DAG: STFD killed $f23, -72, $r1 :: (store (s64) into %fixed-stack.8)
[all …]
H A Daix-csr.ll128 ; MIR64-DAG: STD killed $x16, -128, $x1 :: (store (s64) into %fixed-stack.15, align 16)
129 ; MIR64-DAG: STD killed $x17, -120, $x1 :: (store (s64) into %fixed-stack.14)
130 ; MIR64-DAG: STD killed $x18, -112, $x1 :: (store (s64) into %fixed-stack.13, align 16)
131 ; MIR64-DAG: STD killed $x19, -104, $x1 :: (store (s64) into %fixed-stack.12)
132 ; MIR64-DAG: STD killed $x20, -96, $x1 :: (store (s64) into %fixed-stack.11, align 16)
133 ; MIR64-DAG: STD killed $x21, -88, $x1 :: (store (s64) into %fixed-stack.10)
134 ; MIR64-DAG: STD killed $x22, -80, $x1 :: (store (s64) into %fixed-stack.9, align 16)
135 ; MIR64-DAG: STD killed $x23, -72, $x1 :: (store (s64) into %fixed-stack.8)
136 ; MIR64-DAG: STD killed $x24, -64, $x1 :: (store (s64) into %fixed-stack.7, align 16)
137 ; MIR64-DAG: STD killed $x25, -56, $x1 :: (store (s64) into %fixed-stack.6)
[all …]
H A Daix-csr-vector-extabi.ll67 ; MIR32-DAG: STXVD2X killed $v20, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.1…
68 ; MIR32-DAG: STXVD2X killed $v21, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.1…
69 ; MIR32-DAG: STXVD2X killed $v22, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.9)
70 ; MIR32-DAG: STXVD2X killed $v23, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.8)
71 ; MIR32-DAG: STXVD2X killed $v24, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.7)
72 ; MIR32-DAG: STXVD2X killed $v25, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.6)
73 ; MIR32-DAG: STXVD2X killed $v26, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.5)
74 ; MIR32-DAG: STXVD2X killed $v27, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.4)
75 ; MIR32-DAG: STXVD2X killed $v28, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.3)
76 ; MIR32-DAG: STXVD2X killed $v29, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.2)
[all …]
H A Dsink-down-more-instructions-regpressure-high.mir464 …; CHECK: [[LD:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.28 :: (load (s64) from %fixed-st…
465 …; CHECK: [[LD1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.27 :: (load (s64) from %fixed-s…
466 …; CHECK: [[LD2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.26 :: (load (s64) from %fixed-s…
467 …; CHECK: [[LD3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.25 :: (load (s64) from %fixed-s…
468 …; CHECK: [[LD4:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.24 :: (load (s64) from %fixed-s…
469 …; CHECK: [[LD5:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.23 :: (load (s64) from %fixed-s…
470 …; CHECK: [[LD6:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.22 :: (load (s64) from %fixed-s…
471 …; CHECK: [[LD7:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.21 :: (load (s64) from %fixed-s…
472 …; CHECK: [[LD8:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.20 :: (load (s64) from %fixed-s…
473 …; CHECK: [[LD9:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.19 :: (load (s64) from %fixed-s…
[all …]
H A Daix-cc-byval-mem.ll57 ; 32BIT-NEXT: %[[VAL:[0-9]+]]:gprc = LBZ 0, %fixed-stack.0
64 ; 64BIT-NEXT: %[[VAL:[0-9]+]]:g8rc = LBZ8 0, %fixed-stack.0
159 ; 32BIT-NEXT: %[[VAL:[0-9]+]]:gprc = LBZ 255, %fixed-stack.0
166 ; 64BIT-NEXT: %[[VAL:[0-9]+]]:g8rc = LBZ8 255, %fixed-stack.0
258 ; 32BIT-NEXT: STW %2, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0
259 ; 32BIT-DAG: STW %3, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4
260 ; 32BIT-DAG: STW %4, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8
261 ; 32BIT-DAG: STW %5, 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12
262 ; 32BIT-DAG: STW %6, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16
263 ; 32BIT-DAG: STW %7, 20, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 20
[all …]
/llvm-project/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-memop-scalar-x32.mir60 …ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (p…
64 %1(p0) = G_FRAME_INDEX %fixed-stack.0
65 %0(p0) = G_LOAD %1(p0) :: (invariant load (p0) from %fixed-stack.0, align 16)
85 …ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (p…
89 %1(p0) = G_FRAME_INDEX %fixed-stack.0
90 %0(p0) = G_LOAD %1(p0) :: (invariant load (p0) from %fixed-stack.0, align 16)
110 …ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (p…
114 %1(p0) = G_FRAME_INDEX %fixed-stack.0
115 %0(p0) = G_LOAD %1(p0) :: (invariant load (p0) from %fixed-stack.0, align 16)
137 …; ALL: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s8…
[all …]
/llvm-project/llvm/test/CodeGen/M68k/GlobalISel/
H A Dlegalize-load-store.mir28 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
29 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s8) from %fixed-stack.0, align 8)
31 ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
32 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.1)
33 ; CHECK-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2
34 ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s16) from %fixed-stack.2, align 8)
36 ; CHECK-NEXT: [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3
37 ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX3]](p0) :: (load (p0) from %fixed-stack.3)
38 ; CHECK-NEXT: [[FRAME_INDEX4:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.4
39 ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p0) :: (load (s32) from %fixed
[all...]
H A Dlegalize-and.mir16 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
17 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s8) from %fixed-stack.0, align 8)
18 ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
19 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s8) from %fixed-stack.1, align 4)
25 %3:_(p0) = G_FRAME_INDEX %fixed-stack.1
26 %2:_(s32) = G_LOAD %3(p0) :: (load (s8) from %fixed-stack.1, align 8)
28 %5:_(p0) = G_FRAME_INDEX %fixed-stack.0
29 %4:_(s32) = G_LOAD %5(p0) :: (load (s8) from %fixed-stack.0, align 4)
49 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
50 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed
[all...]
H A Dlegalize-add.mir15 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
16 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s8) from %fixed-stack.0, align 8)
17 ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
18 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s8) from %fixed-stack.1, align 4)
24 %3:_(p0) = G_FRAME_INDEX %fixed-stack.1
25 %2:_(s32) = G_LOAD %3(p0) :: (load (s8) from %fixed-stack.1, align 8)
27 %5:_(p0) = G_FRAME_INDEX %fixed-stack.0
28 %4:_(s32) = G_LOAD %5(p0) :: (load (s8) from %fixed-stack.0, align 4)
48 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
49 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed
[all...]
H A Dlegalize-mul.mir16 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
17 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s8) from %fixed-stack.0, align 8)
18 ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
19 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s8) from %fixed-stack.1, align 4)
25 %3:_(p0) = G_FRAME_INDEX %fixed-stack.1
26 %2:_(s32) = G_LOAD %3(p0) :: (load (s8) from %fixed-stack.1, align 8)
28 %5:_(p0) = G_FRAME_INDEX %fixed-stack.0
29 %4:_(s32) = G_LOAD %5(p0) :: (load (s8) from %fixed-stack.0, align 4)
49 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
50 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed
[all...]
H A Dlegalize-sub.mir17 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
18 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s8) from %fixed-stack.0, align 8)
19 ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
20 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s8) from %fixed-stack.1, align 4)
26 %3:_(p0) = G_FRAME_INDEX %fixed-stack.1
27 %2:_(s32) = G_LOAD %3(p0) :: (load (s8) from %fixed-stack.1, align 8)
29 %5:_(p0) = G_FRAME_INDEX %fixed-stack.0
30 %4:_(s32) = G_LOAD %5(p0) :: (load (s8) from %fixed-stack.0, align 4)
50 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
51 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed
[all...]
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dtailcall_misched_graph.ll25 ; COMMON: fi#-4: {{.*}} fixed, at location [SP+8]
26 ; COMMON: fi#-3: {{.*}} fixed, at location [SP]
27 ; COMMON: fi#-2: {{.*}} fixed, at location [SP+8]
28 ; COMMON: fi#-1: {{.*}} fixed, at location [SP]
32 ; COMMON: [[VRA:%.*]]:gpr64 = LDRXui %fixed-stack.3
33 ; COMMON: [[VRB:%.*]]:gpr64 = LDRXui %fixed-stack.2
34 ; SDAG: STRXui %{{.*}}, %fixed-stack.0
35 ; SDAG: STRXui [[VRB]]{{[^,]*}}, %fixed-stack.1
36 ; GISEL: STRXui [[VRB]]{{[^,]*}}, %fixed-stack.1
37 ; GISEL: STRXui %{{.*}}, %fixed-stack.0
[all …]
/llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/
H A Dlower-args-vararg.ll13 ; RV32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
16 ; RV32-NEXT: G_STORE [[COPY1]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %fixed-stack.1)
19 ; RV32-NEXT: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s32) into %fixed-stack.1 + 4)
22 ; RV32-NEXT: G_STORE [[COPY3]](s32), [[PTR_ADD1]](p0) :: (store (s32) into %fixed-stack.1 + 8)
25 ; RV32-NEXT: G_STORE [[COPY4]](s32), [[PTR_ADD2]](p0) :: (store (s32) into %fixed-stack.1 + 12)
28 ; RV32-NEXT: G_STORE [[COPY5]](s32), [[PTR_ADD3]](p0) :: (store (s32) into %fixed-stack.1 + 16)
31 ; RV32-NEXT: G_STORE [[COPY6]](s32), [[PTR_ADD4]](p0) :: (store (s32) into %fixed-stack.1 + 20)
34 ; RV32-NEXT: G_STORE [[COPY7]](s32), [[PTR_ADD5]](p0) :: (store (s32) into %fixed-stack.1 + 24)
43 ; RV64-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
46 ; RV64-NEXT: G_STORE [[COPY1]](s64), [[FRAME_INDEX]](p0) :: (store (s64) into %fixed-stack.1)
[all …]
/llvm-project/libcxx/test/std/utilities/charconv/charconv.syn/
H A Dchars_format.pass.cpp33 x |= cf::fixed; in test()
38 x &= cf::fixed; in test()
39 assert(x == cf::fixed); in test()
43 x ^= cf::fixed; in test()
47 assert(static_cast<ut>(cf::scientific & (cf::fixed | cf::hex)) == 0); in test()
48 assert(static_cast<ut>(cf::fixed & (cf::scientific | cf::hex)) == 0); in test()
49 assert(static_cast<ut>(cf::hex & (cf::scientific | cf::fixed)) == 0); in test()
51 assert((cf::scientific | cf::fixed) == cf::general); in test()
53 assert(static_cast<ut>(cf::scientific & cf::fixed) == 0); in test()
55 assert((cf::general ^ cf::fixed) == cf::scientific); in test()

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