| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 48 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Val, in EmitTargetCodeForMemset() argument
111 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT), in EmitTargetCodeForMemset()
113 InGlue = Chain.getValue(1); in EmitTargetCodeForMemset()
117 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Val, InGlue); in EmitTargetCodeForMemset()
118 InGlue = Chain.getValue(1); in EmitTargetCodeForMemset()
122 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
124 InGlue = Chain in EmitTargetCodeForMemset()
155 emitRepmovs(const X86Subtarget & Subtarget,SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,MVT AVT) emitRepmovs() argument
177 emitRepmovsB(const X86Subtarget & Subtarget,SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size) emitRepmovsB() argument
207 emitConstantSizeRepmov(SelectionDAG & DAG,const X86Subtarget & Subtarget,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,EVT SizeVT,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) emitConstantSizeRepmov() argument
262 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument
[all...] |
| H A D | X86ISelLoweringCall.cpp | 735 X86TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, in LowerReturn() argument
847 RetOps.push_back(Chain); // Operand #0 = Chain (updated below) in LowerReturn()
859 Chain = DAG.getCopyToReg(Chain, dl, RetVal.first, RetVal.second, Glue); in LowerReturn()
860 Glue = Chain.getValue(1); in LowerReturn()
879 // original Chain stored in RetOps[0], instead of the current Chain updated in LowerReturn()
880 // in the above loop. If we only have sret, RetOps[0] equals to Chain. in LowerReturn()
894 // Chain dependenc in LowerReturn()
1094 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,uint32_t * RegMask) const LowerCallResult() argument
1236 CreateCopyOfByValArgument(SDValue Src,SDValue Dst,SDValue Chain,ISD::ArgFlagsTy Flags,SelectionDAG & DAG,const SDLoc & dl) CreateCopyOfByValArgument() argument
1292 LowerMemArgument(SDValue Chain,CallingConv::ID CallConv,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,const CCValAssign & VA,MachineFrameInfo & MFI,unsigned i) const LowerMemArgument() argument
1503 createVarArgAreaAndStoreRegisters(SDValue & Chain,unsigned StackSize) createVarArgAreaAndStoreRegisters() argument
1614 forwardMustTailParameters(SDValue & Chain) forwardMustTailParameters() argument
1655 lowerVarArgsParameters(SDValue & Chain,unsigned StackSize) lowerVarArgsParameters() argument
1670 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1909 LowerMemOpCallTo(SDValue Chain,SDValue StackPtr,SDValue Arg,const SDLoc & dl,SelectionDAG & DAG,const CCValAssign & VA,ISD::ArgFlagsTy Flags,bool isByVal) const LowerMemOpCallTo() argument
1935 EmitTailCallLoadRetAddr(SelectionDAG & DAG,SDValue & OutRetAddr,SDValue Chain,bool IsTailCall,bool Is64Bit,int FPDiff,const SDLoc & dl) const EmitTailCallLoadRetAddr() argument
1949 EmitTailCallStoreRetAddr(SelectionDAG & DAG,MachineFunction & MF,SDValue Chain,SDValue RetAddrFrIdx,EVT PtrVT,unsigned SlotSize,int FPDiff,const SDLoc & dl) EmitTailCallStoreRetAddr() argument
1985 SDValue Chain = CLI.Chain; LowerCall() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 25 SDValue Chain, SDValue Dst, SDValue Src, in createMemMemNode() argument
31 Ops = { Chain, Dst, LenAdj, Byte }; in createMemMemNode()
33 Ops = { Chain, Dst, Src, LenAdj }; in createMemMemNode()
42 SDValue Chain, SDValue Dst, SDValue Src, in emitMemMemImm() argument
47 return createMemMemNode(DAG, DL, Op, Chain, Dst, Src, LenAdj, Byte); in emitMemMemImm()
51 SDValue Chain, SDValue Dst, SDValue Src, in emitMemMemReg() argument
57 return createMemMemNode(DAG, DL, Op, Chain, Dst, Src, LenAdj, Byte); in emitMemMemReg()
61 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy() argument
68 return emitMemMemImm(DAG, DL, SystemZISD::MVC, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
71 return emitMemMemReg(DAG, DL, SystemZISD::MVC, Chain, Dst, Src, Size); in EmitTargetCodeForMemcpy()
[all …]
|
| H A D | SystemZSelectionDAGInfo.h | 25 SDValue Chain, SDValue Dst, SDValue Src,
32 SDValue Chain, SDValue Dst, SDValue Byte,
38 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
44 EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
49 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest,
54 EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
60 EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
65 EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 106 class Chain;
137 bool colorChainSet(std::vector<Chain*> GV, MachineBasicBlock &MBB,
139 bool colorChain(Chain *G, Color C, MachineBasicBlock &MBB);
140 int scavengeRegister(Chain *G, Color C, MachineBasicBlock &MBB);
142 std::map<unsigned, Chain*> &Active,
143 std::vector<std::unique_ptr<Chain>> &AllChains);
145 std::map<unsigned, Chain*> &RegChains);
147 Chain *getAndEraseNext(Color PreferredColor, std::vector<Chain*> &L);
184 class Chain { class
202 Chain(MachineInstr *MI, unsigned Idx, Color C) in Chain() function in __anonedcf8ffb0211::Chain
[all …]
|
| H A D | AArch64SelectionDAGInfo.cpp | 26 SDValue Chain, SDValue Dst, in EmitMOPS()
67 SDValue Ops[] = {Dst, Size, SrcOrValue, Chain}; in EmitMOPS()
73 SDValue Ops[] = {Dst, SrcOrValue, Size, Chain}; in EmitMOPS()
86 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
138 CLI.setDebugLoc(DL).setChain(Chain).setLibCallee( in EmitUnrolledSetTag()
144 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitUnrolledSetTag()
151 return EmitMOPS(AArch64ISD::MOPS_MEMCOPY, DAG, DL, Chain, Dst, Src, Size, in EmitUnrolledSetTag()
156 return EmitStreamingCompatibleMemLibCall(DAG, DL, Chain, Dst, Src, Size, in EmitUnrolledSetTag()
162 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitUnrolledSetTag()
169 return EmitMOPS(AArch64ISD::MOPS_MEMSET, DAG, dl, Chain, Ds in EmitUnrolledSetTag()
20 EmitMOPS(AArch64ISD::NodeType SDOpcode,SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue SrcOrValue,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitMOPS() argument
80 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument
92 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument
106 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemmove() argument
121 EmitUnrolledSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Ptr,uint64_t ObjSize,const MachineMemOperand * BaseMemOperand,bool ZeroData) EmitUnrolledSetTag() argument
173 EmitTargetCodeForSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Addr,SDValue Size,MachinePointerInfo DstPtrInfo,bool ZeroData) const EmitTargetCodeForSetTag() argument
[all...] |
| H A D | AArch64SelectionDAGInfo.h | 23 const SDLoc &DL, SDValue Chain, SDValue Dst,
29 SDValue Chain, SDValue Dst, SDValue Src,
35 SDValue Chain, SDValue Dst, SDValue Src,
40 EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
47 SDValue Chain, SDValue Op1, SDValue Op2,
52 SDValue Chain, SDValue Dst,
|
| /freebsd-src/tools/tools/ath/athprom/ |
| H A D | eeprom-14 | 25 | Ant Chain 0 $antCtrlChain0 |
26 | Ant Chain 1 $antCtrlChain1 |
27 | Ant Chain 2 $antCtrlChain2 |
28 | Ant Chain common 0x00001120 |
29 | Antenna Gain Chain 0 $antGainCh0 |
30 | Antenna Gain Chain 1 $antGainCh1 |
31 | Antenna Gain Chain 2 $antGainCh2 |
36 | RxTxMargin Chain 0 $rxTxMarginCh0 |
37 | RxTxMargin Chain 1 $rxTxMarginCh1 |
38 | RxTxMargin Chain 2 $rxTxMarginCh2 |
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineBlockPlacement.cpp | 305 void merge(MachineBasicBlock *BB, BlockChain *Chain) { in merge() argument
310 if (!Chain) { in merge()
318 assert(BB == *Chain->begin() && "Passed BB is not head of Chain."); in merge()
319 assert(Chain->begin() != Chain->end()); in merge()
323 for (MachineBasicBlock *ChainBB : *Chain) { in merge()
325 assert(BlockToChain[ChainBB] == Chain && "Incoming blocks not in chain."); in merge()
461 const BlockChain &Chain, const MachineBasicBlock *LoopHeaderBB,
467 const BlockChain &Chain, cons
654 markChainSuccessors(const BlockChain & Chain,const MachineBasicBlock * LoopHeaderBB,const BlockFilterSet * BlockFilter) markChainSuccessors() argument
670 markBlockSuccessors(const BlockChain & Chain,const MachineBasicBlock * MBB,const MachineBasicBlock * LoopHeaderBB,const BlockFilterSet * BlockFilter) markBlockSuccessors() argument
703 collectViableSuccessors(const MachineBasicBlock * BB,const BlockChain & Chain,const BlockFilterSet * BlockFilter,SmallVector<MachineBasicBlock *,4> & Successors) collectViableSuccessors() argument
812 isProfitableToTailDup(const MachineBasicBlock * BB,const MachineBasicBlock * Succ,BranchProbability QProb,const BlockChain & Chain,const BlockFilterSet * BlockFilter) isProfitableToTailDup() argument
966 isTrellis(const MachineBasicBlock * BB,const SmallVectorImpl<MachineBasicBlock * > & ViableSuccs,const BlockChain & Chain,const BlockFilterSet * BlockFilter) isTrellis() argument
1061 getBestTrellisSuccessor(const MachineBasicBlock * BB,const SmallVectorImpl<MachineBasicBlock * > & ViableSuccs,BranchProbability AdjustedSumProb,const BlockChain & Chain,const BlockFilterSet * BlockFilter) getBestTrellisSuccessor() argument
1145 canTailDuplicateUnplacedPreds(const MachineBasicBlock * BB,MachineBasicBlock * Succ,const BlockChain & Chain,const BlockFilterSet * BlockFilter) canTailDuplicateUnplacedPreds() argument
1339 TriangleChain Chain = std::move(Found->second); precomputeTriangleChains() local
1354 TriangleChain &Chain = ChainPair.second; precomputeTriangleChains() local
1413 hasBetterLayoutPredecessor(const MachineBasicBlock * BB,const MachineBasicBlock * Succ,const BlockChain & SuccChain,BranchProbability SuccProb,BranchProbability RealSuccProb,const BlockChain & Chain,const BlockFilterSet * BlockFilter) hasBetterLayoutPredecessor() argument
1592 selectBestSuccessor(const MachineBasicBlock * BB,const BlockChain & Chain,const BlockFilterSet * BlockFilter) selectBestSuccessor() argument
1704 selectBestCandidateBlock(const BlockChain & Chain,SmallVectorImpl<MachineBasicBlock * > & WorkList) selectBestCandidateBlock() argument
1794 BlockChain &Chain = *BlockToChain[MBB]; fillWorkLists() local
1824 buildChain(const MachineBasicBlock * HeadBB,BlockChain & Chain,BlockFilterSet * BlockFilter) buildChain() argument
2202 BlockChain &Chain = *BlockToChain[MBB]; findBestLoopExit() local
2587 BlockChain *Chain = BlockToChain[LoopBB]; collectLoopBlockSet() local
2703 BlockChain *Chain = buildCFGChains() local
3021 repeatedlyTailDuplicateBlock(MachineBasicBlock * BB,MachineBasicBlock * & LPred,const MachineBasicBlock * LoopHeaderBB,BlockChain & Chain,BlockFilterSet * BlockFilter,MachineFunction::iterator & PrevUnplacedBlockIt) repeatedlyTailDuplicateBlock() argument
3078 maybeTailDuplicateBlock(MachineBasicBlock * BB,MachineBasicBlock * LPred,BlockChain & Chain,BlockFilterSet * BlockFilter,MachineFunction::iterator & PrevUnplacedBlockIt,bool & DuplicatedToLPred) maybeTailDuplicateBlock() argument
3100 BlockChain *Chain = BlockToChain[RemBB]; maybeTailDuplicateBlock() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUExportClustering.cpp | 39 static void sortChain(const SIInstrInfo *TII, SmallVector<SUnit *, 8> &Chain, in sortChain() argument
41 if (!PosCount || PosCount == Chain.size()) in sortChain()
48 SmallVector<SUnit *, 8> Copy(Chain); in sortChain()
53 Chain[PosIdx++] = SU; in sortChain()
55 Chain[OtherIdx++] = SU; in sortChain()
111 SmallVector<SUnit *, 8> Chain; in apply() local
122 Chain.push_back(&SU); in apply()
134 if (Chain.size() > 1) { in apply()
135 sortChain(TII, Chain, PosCount); in apply()
136 buildCluster(Chain, DAG); in apply()
|
| /freebsd-src/contrib/llvm-project/clang/include/clang/Serialization/ |
| H A D | ModuleManager.h | 49 SmallVector<std::unique_ptr<ModuleFile>, 2> Chain;
141 ModuleIterator begin() { return Chain.begin(); }
144 ModuleIterator end() { return Chain.end(); }
147 ModuleConstIterator begin() const { return Chain.begin(); }
150 ModuleConstIterator end() const { return Chain.end(); }
153 ModuleReverseIterator rbegin() { return Chain.rbegin(); }
156 ModuleReverseIterator rend() { return Chain.rend(); }
166 ModuleFile &getPrimaryModule() { return *Chain[0]; }
170 ModuleFile &getPrimaryModule() const { return *Chain[0]; }
173 ModuleFile &operator[](unsigned Index) const { return *Chain[Inde
50 SmallVector<std::unique_ptr<ModuleFile>, 2> Chain; global() variable
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 35 static SDValue lowerCallResult(SDValue Chain, SDValue InGlue,
238 SDValue Chain = Op.getOperand(0); in LowerBR_CC() local
246 return DAG.getNode(ARCISD::BRcc, dl, MVT::Other, Chain, Dest, LHS, RHS, in LowerBR_CC()
270 SDValue Chain = CLI.Chain; in LowerCall() local
294 Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, dl); in LowerCall()
329 StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, in LowerCall()
337 DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo()); in LowerCall()
346 Chain in LowerCall()
408 lowerCallResult(SDValue Chain,SDValue Glue,const SmallVectorImpl<CCValAssign> & RVLocs,SDLoc dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) lowerCallResult() argument
470 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
485 LowerCallArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,SDLoc dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallArguments() argument
644 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGTargetInfo.h | 52 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemcpy() argument
68 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove() argument
82 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemset() argument
95 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForMemcmp() argument
107 EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForMemchr() argument
120 EmitTargetCodeForStrcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrcpy() argument
132 EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForStrcmp() argument
140 EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrlen() argument
146 EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrnlen() argument
153 SDValue Chain, SDValue Addr, in EmitTargetCodeForSetTag() argument
|
| H A D | SelectionDAG.h | 747 SDValue getJumpTableDebugInfo(int JTI, SDValue Chain, const SDLoc &DL);
785 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
787 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
794 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
797 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
803 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
806 SDValue Ops[] = { Chain, Reg, N, Glue };
811 SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) {
813 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
820 SDValue getCopyFromReg(SDValue Chain, cons
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSelectionDAGInfo.cpp | 39 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitSpecializedLibcall() argument
129 .setChain(Chain) in EmitSpecializedLibcall()
169 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy() argument
178 return DAG.getNode(ARMISD::MEMCPYLOOP, dl, MVT::Other, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
188 return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, in EmitTargetCodeForMemcpy()
192 return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, in EmitTargetCodeForMemcpy()
232 Dst = DAG.getNode(ARMISD::MEMCPY, dl, VTs, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
235 Chain = Dst.getValue(2); in EmitTargetCodeForMemcpy()
244 return Chain; in EmitTargetCodeForMemcpy()
259 Loads[i] = DAG.getLoad(VT, dl, Chain, in EmitTargetCodeForMemcpy()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 338 SDValue Chain = Op.getOperand(0); in LowerBR_JT() local
350 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
355 return DAG.getNode(XCoreISD::BR_JT32, dl, MVT::Other, Chain, TargetJT, in LowerBR_JT()
360 const SDLoc &DL, SDValue Chain, SDValue Base, int64_t Offset, in lowerLoadWordFromAlignedBasePlusOffset() argument
364 return DAG.getLoad(PtrVT, DL, Chain, Base, MachinePointerInfo()); in lowerLoadWordFromAlignedBasePlusOffset()
385 SDValue Low = DAG.getLoad(PtrVT, DL, Chain, LowAddr, MachinePointerInfo()); in lowerLoadWordFromAlignedBasePlusOffset()
386 SDValue High = DAG.getLoad(PtrVT, DL, Chain, HighAddr, MachinePointerInfo()); in lowerLoadWordFromAlignedBasePlusOffset()
390 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Low.getValue(1), in lowerLoadWordFromAlignedBasePlusOffset()
392 SDValue Ops[] = { Result, Chain }; in lowerLoadWordFromAlignedBasePlusOffset()
414 SDValue Chain in LowerLOAD() local
487 SDValue Chain = ST->getChain(); LowerSTORE() local
814 SDValue Chain = Op.getOperand(0); LowerEH_RETURN() local
853 SDValue Chain = Op.getOperand(0); LowerINIT_TRAMPOLINE() local
947 SDValue Chain = CLI.Chain; LowerCall() local
970 LowerCallResult(SDValue Chain,SDValue InGlue,const SmallVectorImpl<CCValAssign> & RVLocs,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) LowerCallResult() argument
1017 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
1149 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1168 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument
1340 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
1693 SDValue Chain = ST->getChain(); PerformDAGCombine() local
[all...] |
| H A D | XCoreISelDAGToDAG.cpp | 228 /// by New. There must be at most one instruction between Old and Chain and in replaceInChain()
232 replaceInChain(SelectionDAG *CurDAG, SDValue Chain, SDValue Old, SDValue New) in replaceInChain()
234 if (Chain == Old) in replaceInChain()
236 if (Chain->getOpcode() != ISD::TokenFactor) in replaceInChain()
240 for (unsigned i = 0, e = Chain->getNumOperands(); i != e; ++i) { in replaceInChain()
241 if (Chain->getOperand(i) == Old) { in replaceInChain()
245 Ops.push_back(Chain->getOperand(i));
250 return CurDAG->getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, Ops); in tryBRIND()
256 SDValue Chain = N->getOperand(0); in tryBRIND()
271 SDValue NewChain = replaceInChain(CurDAG, Chain, CheckEventChainOu in tryBRIND()
225 replaceInChain(SelectionDAG * CurDAG,SDValue Chain,SDValue Old,SDValue New) replaceInChain() argument
249 SDValue Chain = N->getOperand(0); tryBRIND() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 245 SparcTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, in LowerReturn() argument
251 return LowerReturn_64(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG); in LowerReturn()
252 return LowerReturn_32(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG); in LowerReturn()
256 SparcTargetLowering::LowerReturn_32(SDValue Chain, CallingConv::ID CallConv, in LowerReturn_32() argument
274 SmallVector<SDValue, 4> RetOps(1, Chain); in LowerReturn_32()
299 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Glue); in LowerReturn_32()
300 Glue = Chain.getValue(1); in LowerReturn_32()
303 Chain = DAG.getCopyToReg(Chain, D in LowerReturn_32()
341 LowerReturn_64(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_64() argument
418 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
432 LowerFormalArguments_32(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments_32() argument
627 LowerFormalArguments_64(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments_64() argument
829 SDValue Chain = CLI.Chain; LowerCall_32() local
1228 SDValue Chain = CLI.Chain; LowerCall_64() local
2248 SDValue Chain = DAG.getEntryNode(); LowerGlobalTLSAddress() local
2320 LowerF128_LibCallArg(SDValue Chain,ArgListTy & Args,SDValue Arg,const SDLoc & DL,SelectionDAG & DAG) const LowerF128_LibCallArg() argument
2359 SDValue Chain = DAG.getEntryNode(); LowerF128Op() local
2429 SDValue Chain = DAG.getEntryNode(); LowerF128Compare() local
2632 SDValue Chain = Op.getOperand(0); LowerBR_CC() local
2780 SDValue Chain = Op.getOperand(0); // Legalize the chain. LowerDYNAMIC_STACKALLOC() local
2845 SDValue Chain = DAG.getNode(SPISD::FLUSHW, getFLUSHW() local
2862 SDValue Chain; getFRAMEADDR() local
3063 SDValue Chain = DAG.getStore( LowerSTORE() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 230 SelectionDAG &DAG, SDValue Chain, in unpackFromRegLoc() argument
256 Val = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); in unpackFromRegLoc()
261 static SDValue unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, in unpackFromMemLoc() argument
283 ExtType, DL, LocVT, Chain, FIN, in unpackFromMemLoc()
288 static SDValue unpack64(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, in unpack64() argument
301 return DAG.getLoad(VA.getValVT(), DL, Chain, FIN, in unpack64()
309 SDValue Lo = DAG.getCopyFromReg(Chain, DL, LoVReg, MVT::i32); in unpack64()
315 Hi = DAG.getLoad(MVT::i32, DL, Chain, FIN, in unpack64()
321 Hi = DAG.getCopyFromReg(Chain, DL, HiVReg, MVT::i32); in unpack64()
328 SDValue Chain, CallingCon in LowerFormalArguments() argument
436 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
512 SDValue Chain = CLI.Chain; LowerCall() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySelectionDAGInfo.cpp | 22 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy() argument
32 {Chain, MemIdx, MemIdx, Dst, Src, in EmitTargetCodeForMemcpy()
37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove() argument
40 return EmitTargetCodeForMemcpy(DAG, DL, Chain, Op1, Op2, Op3, in EmitTargetCodeForMemmove()
46 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Val, in EmitTargetCodeForMemset() argument
56 return DAG.getNode(WebAssemblyISD::MEMORY_FILL, DL, MVT::Other, Chain, MemIdx, in EmitTargetCodeForMemset()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 326 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerFormalArguments()
367 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments()
400 return Chain; in LowerFormalArguments()
411 SDValue Chain = CLI.Chain; in LowerCall()
449 Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, CLI.DL); in LowerCall()
488 Chain = DAG.getCopyToReg(Chain, CLI.DL, Reg.first, Reg.second, InGlue); in LowerCall()
489 InGlue = Chain in LowerCall()
325 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
410 SDValue Chain = CLI.Chain; LowerCall() local
534 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
583 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
642 SDValue Chain = Op.getOperand(0); LowerBR_CC() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 395 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerFormalArguments() argument
401 return LowerCCCArguments(Chain, CallConv, IsVarArg, Ins, DL, DAG, InVals); in LowerFormalArguments()
414 SDValue Chain = CLI.Chain; in LowerCall() local
426 return LowerCCCCallTo(Chain, Callee, CallConv, IsVarArg, IsTailCall, Outs, in LowerCall()
436 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerCCCArguments() argument
462 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments()
502 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
517 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain); in LowerCCCArguments()
541 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
604 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool IsVarArg,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
778 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
870 SDValue Chain = Op.getOperand(0); LowerBR_CC() local
1021 SDValue Chain = Op.getOperand(0); LowerDYNAMIC_STACKALLOC() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoadStoreVectorizer.cpp | 146 // A Chain is a set of instructions such that:
161 using Chain = SmallVector<ChainElem, 1>; typedef
163 void sortChainInBBOrder(Chain &C) { in sortChainInBBOrder()
167 void sortChainInOffsetOrder(Chain &C) { in sortChainInOffsetOrder()
187 Instruction *propagateMetadata(Instruction *I, const Chain &C) { in propagateMetadata()
275 bool runOnChain(Chain &C);
280 std::vector<Chain> splitChainByContiguity(Chain &C);
285 std::vector<Chain> splitChainByMayAliasInstrs(Chain
638 __anon3152ccc40602(const auto &Chain) splitChainByContiguity() argument
[all...] |
| /freebsd-src/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/UninitializedObject/ |
| H A D | UninitializedObject.h | 166 FieldChain Chain; variable
170 Chain = NewChain; in FieldChainInfo()
186 bool isEmpty() const { return Chain.isEmpty(); } in isEmpty()
188 const FieldNode &getHead() const { return Chain.getHead(); } in getHead()
343 NewChain.Chain = ChainFactory.add(FN, Chain); in add()
349 FieldChainInfo NewChain(ChainFactory, Chain.getTail()); in replaceHead()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 568 SDValue Chain, CallingConv::ID CallConv, bool isVarArg, in LowerFormalArguments() argument
577 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); in LowerFormalArguments()
580 return Chain; in LowerFormalArguments()
593 SDValue Chain = CLI.Chain; in LowerCall() local
608 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, in LowerCall()
619 SDValue Chain, CallingConv::ID CallConv, bool isVarArg, in LowerCCCArguments() argument
656 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments()
699 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
716 Chain in LowerCCCArguments()
735 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
806 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
935 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
1128 SDValue Chain = Op.getOperand(0); LowerBR_CC() local
[all...] |