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Searched refs:AllocationOrder (Results 1 – 13 of 13) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocGreedy.h42 class AllocationOrder; variable
256 /// Candidate info for each PhysReg in AllocationOrder.
331 const AllocationOrder &Order);
342 MCRegister tryAssign(const LiveInterval &, AllocationOrder &,
344 MCRegister tryEvict(const LiveInterval &, AllocationOrder &,
347 MCRegister tryRegionSplit(const LiveInterval &, AllocationOrder &,
351 AllocationOrder &Order,
357 AllocationOrder &Order,
366 AllocationOrder &Order);
370 AllocationOrder
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H A DAllocationOrder.h30 class LLVM_LIBRARY_VISIBILITY AllocationOrder {
45 const AllocationOrder &AO;
49 Iterator(const AllocationOrder &AO, int Pos) : AO(AO), Pos(Pos) {} in Iterator()
84 static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM,
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() function
H A DAllocationOrder.cpp1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
12 // hints and target hooks. The AllocationOrder class encapsulates all of that.
16 #include "AllocationOrder.h"
29 AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM, in create()
50 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
H A DRegAllocEvictionAdvisor.h21 class AllocationOrder; variable
108 const LiveInterval &VirtReg, const AllocationOrder &Order,
129 const AllocationOrder &Order,
211 const AllocationOrder &, uint8_t,
H A DRegisterScavenging.cpp130 const LiveRegUnits &LiveOut, ArrayRef<MCPhysReg> AllocationOrder, in findSurvivorBackwards() argument
152 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards()
177 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards()
305 ArrayRef<MCPhysReg> AllocationOrder = RC.getRawAllocationOrder(MF); in scavengeRegisterBackwards() local
307 *MRI, std::prev(MBBI), To, LiveUnits, AllocationOrder, RestoreAfter); in scavengeRegisterBackwards()
H A DRegAllocGreedy.cpp15 #include "AllocationOrder.h"
398 AllocationOrder &Order,
464 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix)) { in canReassign()
532 const AllocationOrder &Order,
578 AllocationOrder &Order,
869 const AllocationOrder &Order) {
1061 AllocationOrder &Order,
1095 AllocationOrder &Order,
1172 AllocationOrder &Order,
1234 AllocationOrder in trySplitAroundHintReg()
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H A DRegAllocFast.cpp938 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtReg()
939 for (MCPhysReg PhysReg : AllocationOrder) { in allocVirtReg()
993 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in defineLiveThroughVirtReg()
994 assert(!AllocationOrder.empty() && "Allocation order must not be empty"); in defineLiveThroughVirtReg()
995 PhysReg = AllocationOrder[0]; in defineLiveThroughVirtReg()
1072 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in defineVirtReg()
1073 if (AllocationOrder.empty()) in defineVirtReg()
1075 return setPhysReg(MI, MO, *AllocationOrder.begin()); in defineVirtReg()
1163 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in setPhysReg()
1164 if (AllocationOrder in setPhysReg()
911 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); allocVirtReg() local
966 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); allocVirtRegUndef() local
1044 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); defineVirtReg() local
1135 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); useVirtReg() local
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H A DMLRegAllocEvictAdvisor.cpp13 #include "AllocationOrder.h"
148 // interferring live range at that position, in the order in AllocationOrder.
308 const AllocationOrder &Order,
324 const LiveInterval &VirtReg, const AllocationOrder &Order,
441 const LiveInterval &VirtReg, const AllocationOrder &Order,
591 const LiveInterval &, const AllocationOrder &, unsigned, uint8_t, in tryFindEvictionCandidatePosition()
667 const LiveInterval &VirtReg, const AllocationOrder &Order, in tryFindEvictionCandidate()
688 // Track the index->register mapping because AllocationOrder doesn't do that in tryFindEvictionCandidate()
701 // of AllocationOrder one at a time. If it's not legally available, we mask in tryFindEvictionCandidate()
704 // features at - in AllocationOrder orde in tryFindEvictionCandidate()
588 tryFindEvictionCandidatePosition(const LiveInterval &,const AllocationOrder &,unsigned,uint8_t,const SmallVirtRegSet &) const tryFindEvictionCandidatePosition() argument
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H A DRegAllocEvictionAdvisor.cpp14 #include "AllocationOrder.h"
277 const LiveInterval &VirtReg, const AllocationOrder &Order, in tryFindEvictionCandidate()
H A DRegAllocBasic.cpp14 #include "AllocationOrder.h"
262 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix); in selectOrSplit()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td499 // Make AllocationOrder as similar as G8RC's to avoid potential spilling.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.td87 // or AllocationOrder
/freebsd-src/lib/clang/libllvm/
H A DMakefile187 SRCS_MIN+= CodeGen/AllocationOrder.cpp