| /dflybsd-src/sys/dev/drm/amd/display/dc/calcs/ |
| H A D | dcn_calc_auto.c | 176 …v->byte_per_pixel_in_detc[k], 2.0) / 2.0 * v->v_ratio[k] / 2) / (v->htotal[k] / v->pixel_clock[k]); in mode_support_and_system_configuration()
194 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0; in mode_support_and_system_configuration()
197 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 1.5; in mode_support_and_system_configuration()
242 …at[k] == dcn_bw_444 && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0 > (v-… in mode_support_and_system_configuration()
245 …== dcn_bw_writeback && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) >dcn_bw_min… in mode_support_and_system_configuration()
265 v->required_output_bw = v->pixel_clock[k] / 2.0; in mode_support_and_system_configuration()
268 v->required_output_bw = v->pixel_clock[k]; in mode_support_and_system_configuration()
272 v->required_output_bw = v->pixel_clock[k] * 3.0 / 2.0; in mode_support_and_system_configuration()
275 v->required_output_bw = v->pixel_clock[k] * 3.0; in mode_support_and_system_configuration()
331 …v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(… in mode_support_and_system_configuration()
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| /dflybsd-src/sys/dev/drm/amd/amdgpu/ |
| H A D | atombios_encoders.c | 411 args.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dac()
472 if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dvo()
480 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
484 if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dvo()
490 args.dvo_v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
496 args.dvo_v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
680 args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
688 else if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dig_encoder()
715 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
723 else if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock)) in amdgpu_atombios_encoder_setup_dig_encoder()
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| H A D | amdgpu_encoders.c | 189 u32 pixel_clock) in amdgpu_dig_monitor_is_duallink() argument
209 if (pixel_clock > 340000) in amdgpu_dig_monitor_is_duallink()
214 if (pixel_clock > 165000) in amdgpu_dig_monitor_is_duallink()
231 if (pixel_clock > 340000) in amdgpu_dig_monitor_is_duallink()
236 if (pixel_clock > 165000) in amdgpu_dig_monitor_is_duallink()
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| H A D | amdgpu_mode.h | 469 uint32_t pixel_clock; member
596 u32 pixel_clock);
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| /dflybsd-src/sys/dev/drm/radeon/ |
| H A D | atombios_encoders.c | 450 args.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dac_setup()
506 args.sTVEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_tv_setup()
571 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) in atombios_dvo_setup()
579 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
583 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) in atombios_dvo_setup()
589 args.dvo_v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
595 args.dvo_v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
665 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
674 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) in atombios_digital_setup()
690 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_digital_setup()
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| H A D | radeon_encoders.c | 360 u32 pixel_clock) in radeon_dig_monitor_is_duallink() argument
382 if (pixel_clock > 340000) in radeon_dig_monitor_is_duallink()
387 if (pixel_clock > 165000) in radeon_dig_monitor_is_duallink()
407 if (pixel_clock > 340000) in radeon_dig_monitor_is_duallink()
412 if (pixel_clock > 165000) in radeon_dig_monitor_is_duallink()
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| H A D | radeon_mode.h | 470 uint32_t pixel_clock; member
744 u32 pixel_clock);
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| /dflybsd-src/sys/dev/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 111 uint32_t pixel_clock; /* khz */ member
124 uint32_t pixel_clock; /* in KHz */ member
151 uint32_t pixel_clock; member
194 uint32_t pixel_clock; member
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| /dflybsd-src/sys/dev/drm/amd/display/dc/bios/ |
| H A D | command_table.c | 243 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in encoder_control_digx_v3()
272 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in encoder_control_digx_v4()
295 params.ulPixelClock = cntl->pixel_clock / 10; in encoder_control_digx_v5()
458 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v2()
464 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v2()
595 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v3()
601 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v3()
721 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20)); in transmitter_control_v4()
727 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10)); in transmitter_control_v4()
800 params.usSymClock = cpu_to_le16((uint16_t) (cntl->pixel_clock / 10)); in transmitter_control_v1_5()
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| H A D | command_table.h | 58 uint32_t pixel_clock,
63 uint32_t pixel_clock,
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| H A D | command_table2.h | 58 uint32_t pixel_clock,
63 uint32_t pixel_clock,
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| H A D | command_table_helper.c | 201 ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10)); in dal_cmd_table_helper_assign_control_parameter()
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| H A D | command_table2.c | 116 params.pclk_10khz = cntl->pixel_clock / 10; in encoder_control_digx_v1_5()
215 ps.param.symclk_10khz = cntl->pixel_clock/10; in transmitter_control_v1_6()
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| /dflybsd-src/sys/dev/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.c | 875 uint32_t pixel_clock) in dcn10_link_encoder_enable_tmds_output() argument
895 cntl.pixel_clock = pixel_clock; in dcn10_link_encoder_enable_tmds_output()
932 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_output()
971 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_mst_output()
1054 cntl.pixel_clock = link_settings->link_settings.link_rate * in dcn10_link_encoder_dp_set_lane_settings()
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| H A D | dcn10_stream_encoder.c | 491 cntl.pixel_clock = actual_pix_clk_khz; in enc1_stream_encoder_hdmi_set_stream_attribute()
597 cntl.pixel_clock = crtc_timing->pix_clk_khz; in enc1_stream_encoder_dvi_set_stream_attribute()
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| H A D | dcn10_link_encoder.h | 285 uint32_t pixel_clock);
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| /dflybsd-src/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.c | 926 uint32_t pixel_clock) in dce110_link_encoder_enable_tmds_output() argument
946 cntl.pixel_clock = pixel_clock; in dce110_link_encoder_enable_tmds_output()
983 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_output()
1022 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_mst_output()
1101 cntl.pixel_clock = link_settings->link_settings.link_rate * in dce110_link_encoder_dp_set_lane_settings()
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| H A D | dce_link_encoder.h | 214 uint32_t pixel_clock);
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| /dflybsd-src/sys/dev/drm/include/drm/ |
| H A D | drm_displayid.h | 77 u8 pixel_clock[3]; member
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| H A D | drm_connector.h | 210 unsigned int pixel_clock; member
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| H A D | drm_edid.h | 165 __le16 pixel_clock; /* need to multiply by 10 KHz */ member
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| /dflybsd-src/sys/dev/drm/amd/display/dc/virtual/ |
| H A D | virtual_link_encoder.c | 46 uint32_t pixel_clock) {} in virtual_link_encoder_enable_tmds_output() argument
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| /dflybsd-src/sys/dev/drm/amd/display/dc/inc/hw/ |
| H A D | link_encoder.h | 127 uint32_t pixel_clock);
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| /dflybsd-src/sys/dev/drm/amd/display/dc/ |
| H A D | dc_bios_types.h | 156 uint32_t pixel_clock);
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| /dflybsd-src/sys/dev/drm/ |
| H A D | drm_edid.c | 2246 timing->pixel_clock = cpu_to_le16(1088); in drm_mode_detailed()
2248 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; in drm_mode_detailed()
2760 if (timing->pixel_clock) { in do_detailed_mode()
4545 unsigned pixel_clock = (timings->pixel_clock[0] | in drm_mode_displayid_detailed() local
4546 (timings->pixel_clock[1] << 8) | in drm_mode_displayid_detailed()
4547 (timings->pixel_clock[2] << 16)); in drm_mode_displayid_detailed()
4562 mode->clock = pixel_clock * 10; in drm_mode_displayid_detailed()
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