| /dflybsd-src/contrib/gcc-8.0/gcc/config/i386/ |
| H A D | znver1.md | 90 (eq_attr "memory" "none,unknown"))) 96 (eq_attr "memory" "store"))) 102 (eq_attr "memory" "both"))) 108 (eq_attr "memory" "load"))) 114 (eq_attr "memory" "both"))) 129 (eq_attr "memory" "none"))) 135 (eq_attr "memory" "!none"))) 144 (eq_attr "memory" "none")))) 151 (eq_attr "memory" "none")))) 158 (eq_attr "memory" "none")))) [all …]
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| H A D | haswell.md | 57 ;; Pentium Pro's five pipelines. Port 2,3 are responsible for memory loads, 58 ;; port 7 for store address calculations, port 4 for memory stores, and 86 ;; imov with memory operands does not use the integer units. 88 ;; units if it has memory operands. 91 (and (eq_attr "memory" "none") 97 (and (eq_attr "memory" "load") 103 (and (eq_attr "memory" "store") 109 (and (eq_attr "memory" "none") 115 (and (eq_attr "memory" "load") 121 (and (eq_attr "memory" "store") [all …]
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| H A D | btver2.md | 108 (and (eq_attr "memory" "load") 119 (and (eq_attr "memory" "load") 143 (eq_attr "memory" "none,unknown")))) 149 (eq_attr "memory" "none,unknown"))) 156 (eq_attr "memory" "load,both")))) 162 (eq_attr "memory" "load,both"))) 169 (eq_attr "memory" "none,unknown")))) 176 (eq_attr "memory" "load")))) 183 (eq_attr "memory" "none,unknown")))) 190 (eq_attr "memory" "load")))) [all …]
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| H A D | core2.md | 76 ;; Pentium Pro's five pipelines. Port 2 is responsible for memory loads, 77 ;; port 3 for store address calculations, port 4 for memory stores, and 114 ;; imov with memory operands does not use the integer units. 116 ;; units if it has memory operands. 119 (and (eq_attr "memory" "none") 125 (and (eq_attr "memory" "load") 131 (and (eq_attr "memory" "store") 137 (and (eq_attr "memory" "none") 143 (and (eq_attr "memory" "load") 149 (and (eq_attr "memory" "store") [all …]
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| H A D | ppro.md | 72 ;; Simple instructions of the register-memory form have two to three uops. 142 ;; imov with memory operands does not use the integer units. 145 (and (eq_attr "memory" "none") 151 (and (eq_attr "memory" "load") 157 (and (eq_attr "memory" "store") 162 ;; units if it has memory operands. 165 (and (eq_attr "memory" "none") 171 (and (eq_attr "memory" "load") 178 (and (eq_attr "memory" "none") 183 ;; The load and store units need to be reserved when memory operands [all …]
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| H A D | bdver3.md | 133 (eq_attr "memory" "none,unknown")))) 138 (eq_attr "memory" "none,unknown"))) 144 (eq_attr "memory" "load,both")))) 149 (eq_attr "memory" "load,both"))) 155 (eq_attr "memory" "load,both,store"))) 163 (eq_attr "memory" "none,unknown")))) 169 (eq_attr "memory" "none,unknown")))) 174 (eq_attr "memory" "load"))) 180 (eq_attr "memory" "load")))) 185 (eq_attr "memory" "store"))) [all …]
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| H A D | bdver1.md | 159 (eq_attr "memory" "none,unknown")))) 164 (eq_attr "memory" "none,unknown"))) 170 (eq_attr "memory" "load,both")))) 175 (eq_attr "memory" "load,both"))) 187 (eq_attr "memory" "none,unknown"))) 193 (eq_attr "memory" "load,both"))) 202 (eq_attr "memory" "load,both,store"))) 210 (eq_attr "memory" "none,unknown")))) 216 (eq_attr "memory" "none,unknown")))) 221 (eq_attr "memory" "load"))) [all …]
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| H A D | athlon.md | 45 (and (eq_attr "memory" "load,store") 208 (eq_attr "memory" "none,unknown"))) 215 (eq_attr "memory" "none,unknown")))) 220 (eq_attr "memory" "none,unknown"))) 226 (eq_attr "memory" "none,unknown")))) 231 (eq_attr "memory" "load,both"))) 237 (eq_attr "memory" "load,both")))) 242 (eq_attr "memory" "load,both"))) 256 (eq_attr "memory" "none,unknown"))) 261 (eq_attr "memory" "load,both"))) [all …]
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| H A D | slm.md | 101 (and (eq_attr "memory" "none") 109 (and (eq_attr "memory" "!none") 117 (and (eq_attr "memory" "none") 125 (and (eq_attr "memory" "!none") 132 (eq_attr "memory" "none") (eq_attr "prefix_0f" "0"))) 139 (eq_attr "memory" "none") (eq_attr "prefix_0f" "1"))) 145 (eq_attr "memory" "!none"))) 151 (eq_attr "memory" "none"))) 157 (eq_attr "memory" "!none"))) 163 (eq_attr "memory" "none"))) [all …]
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| H A D | x86-tune-sched.c | 241 enum attr_memory memory; in ix86_adjust_cost() local 303 memory = get_attr_memory (insn); in ix86_adjust_cost() 308 if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH) in ix86_adjust_cost() 332 memory = get_attr_memory (insn); in ix86_adjust_cost() 337 if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH) in ix86_adjust_cost() 367 memory = get_attr_memory (insn); in ix86_adjust_cost() 372 if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH) in ix86_adjust_cost() 401 memory = get_attr_memory (insn); in ix86_adjust_cost() 406 if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH) in ix86_adjust_cost() 434 memory = get_attr_memory (insn); in ix86_adjust_cost() [all …]
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| H A D | atom.md | 109 (and (eq_attr "memory" "none") 117 (and (eq_attr "memory" "!none") 125 (and (eq_attr "memory" "none") 133 (and (eq_attr "memory" "!none") 140 (eq_attr "memory" "none"))) 146 (eq_attr "memory" "!none"))) 152 (eq_attr "memory" "none"))) 158 (eq_attr "memory" "!none"))) 164 (eq_attr "memory" "none"))) 170 (eq_attr "memory" "!none"))) [all …]
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| H A D | pentium.md | 43 (eq_attr "memory" "!both"))) 100 ;; Pentium preserves memory ordering, so when load-execute-store 104 ;; We model this by allocating "memory" unit when store is pending 107 (define_cpu_unit "pentium-memory" "pentium") 110 (absence_set "pentium-load0,pentium-load1" "pentium-memory") 125 + pentium-memory)") 127 + pentium-memory)") 129 + pentium-memory) 157 (eq_attr "memory" "none,load"))) 163 (and (eq_attr "memory" "load,store") [all …]
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| H A D | k6.md | 82 (eq_attr "memory" "none"))) 88 (eq_attr "memory" "load"))) 94 (eq_attr "memory" "store,both,unknown"))) 106 (eq_attr "memory" "load"))) 112 (eq_attr "memory" "store,both,unknown"))) 119 (eq_attr "memory" "none"))) 125 (eq_attr "memory" "!none"))) 132 (eq_attr "memory" "none"))) 138 (eq_attr "memory" "load"))) 144 (eq_attr "memory" "store,both,unknown"))) [all …]
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| /dflybsd-src/contrib/gcc-4.7/gcc/config/i386/ |
| H A D | core2.md | 76 ;; Pentium Pro's five pipelines. Port 2 is responsible for memory loads, 77 ;; port 3 for store address calculations, port 4 for memory stores, and 114 ;; imov with memory operands does not use the integer units. 116 ;; units if it has memory operands. 119 (and (eq_attr "memory" "none") 125 (and (eq_attr "memory" "load") 131 (and (eq_attr "memory" "store") 137 (and (eq_attr "memory" "none") 143 (and (eq_attr "memory" "load") 149 (and (eq_attr "memory" "store") [all …]
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| H A D | ppro.md | 72 ;; Simple instructions of the register-memory form have two to three uops. 142 ;; imov with memory operands does not use the integer units. 145 (and (eq_attr "memory" "none") 151 (and (eq_attr "memory" "load") 157 (and (eq_attr "memory" "store") 162 ;; units if it has memory operands. 165 (and (eq_attr "memory" "none") 171 (and (eq_attr "memory" "load") 178 (and (eq_attr "memory" "none") 183 ;; The load and store units need to be reserved when memory operands [all …]
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| H A D | bdver1.md | 155 (eq_attr "memory" "none,unknown")))) 160 (eq_attr "memory" "none,unknown"))) 166 (eq_attr "memory" "load,both")))) 171 (eq_attr "memory" "load,both"))) 183 (eq_attr "memory" "none,unknown"))) 189 (eq_attr "memory" "load,both"))) 198 (eq_attr "memory" "load,both,store"))) 206 (eq_attr "memory" "none,unknown")))) 212 (eq_attr "memory" "none,unknown")))) 217 (eq_attr "memory" "load"))) [all …]
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| H A D | athlon.md | 46 (and (eq_attr "memory" "load,store") 209 (eq_attr "memory" "none,unknown"))) 216 (eq_attr "memory" "none,unknown")))) 221 (eq_attr "memory" "none,unknown"))) 227 (eq_attr "memory" "none,unknown")))) 232 (eq_attr "memory" "load,both"))) 238 (eq_attr "memory" "load,both")))) 243 (eq_attr "memory" "load,both"))) 257 (eq_attr "memory" "none,unknown"))) 262 (eq_attr "memory" "load,both"))) [all …]
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| H A D | atom.md | 109 (and (eq_attr "memory" "none") 117 (and (eq_attr "memory" "!none") 125 (and (eq_attr "memory" "none") 133 (and (eq_attr "memory" "!none") 140 (eq_attr "memory" "none"))) 146 (eq_attr "memory" "!none"))) 152 (eq_attr "memory" "none"))) 158 (eq_attr "memory" "!none"))) 164 (eq_attr "memory" "none"))) 170 (eq_attr "memory" "!none"))) [all …]
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| H A D | pentium.md | 43 (eq_attr "memory" "!both"))) 100 ;; Pentium preserves memory ordering, so when load-execute-store 104 ;; We model this by allocating "memory" unit when store is pending 107 (define_cpu_unit "pentium-memory" "pentium") 110 (absence_set "pentium-load0,pentium-load1" "pentium-memory") 125 + pentium-memory)") 127 + pentium-memory)") 129 + pentium-memory) 157 (eq_attr "memory" "none,load"))) 163 (and (eq_attr "memory" "load,store") [all …]
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| H A D | k6.md | 83 (eq_attr "memory" "none"))) 89 (eq_attr "memory" "load"))) 95 (eq_attr "memory" "store,both,unknown"))) 107 (eq_attr "memory" "load"))) 113 (eq_attr "memory" "store,both,unknown"))) 120 (eq_attr "memory" "none"))) 126 (eq_attr "memory" "!none"))) 133 (eq_attr "memory" "none"))) 139 (eq_attr "memory" "load"))) 145 (eq_attr "memory" "store,both,unknown"))) [all …]
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| /dflybsd-src/contrib/gdb-7/gdb/gnulib/import/ |
| H A D | str-two-way.h | 255 size_t memory = 0; in two_way_short_needle() local 260 i = MAX (suffix, memory); in two_way_short_needle() 268 while (memory < i + 1 && (CANON_ELEMENT (needle[i]) in two_way_short_needle() 271 if (i + 1 < memory + 1) in two_way_short_needle() 276 memory = needle_len - period; in two_way_short_needle() 281 memory = 0; in two_way_short_needle() 359 size_t memory = 0; in two_way_long_needle() local 369 if (memory && shift < period) in two_way_long_needle() 376 memory = 0; in two_way_long_needle() 382 i = MAX (suffix, memory); in two_way_long_needle() [all …]
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| /dflybsd-src/contrib/grep/lib/ |
| H A D | str-two-way.h | 255 size_t memory = 0; in two_way_short_needle() local 260 i = MAX (suffix, memory); in two_way_short_needle() 268 while (memory < i + 1 && (CANON_ELEMENT (needle[i]) in two_way_short_needle() 271 if (i + 1 < memory + 1) in two_way_short_needle() 276 memory = needle_len - period; in two_way_short_needle() 281 memory = 0; in two_way_short_needle() 359 size_t memory = 0; in two_way_long_needle() local 369 if (memory && shift < period) in two_way_long_needle() 376 memory = 0; in two_way_long_needle() 382 i = MAX (suffix, memory); in two_way_long_needle() [all …]
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| /dflybsd-src/contrib/tcsh-6/nls/russian/ |
| H A D | set19 | 5 3 free(%lx) above top of memory. 6 4 free(%lx) below bottom of memory. 10 8 %s current memory allocation:\nfree:\t 13 11 \tAllocated memory from 0x%lx to 0x%lx. Real top at 0x%lx\n 14 12 Allocated memory from 0x%lx to 0x%lx (%ld).\n 15 13 %s current memory allocation:\n
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| /dflybsd-src/bin/sh/ |
| H A D | redir.c | 117 char memory[10]; /* file descriptors to write to memory */ in redirect() local 121 memory[i] = 0; in redirect() 122 memory[1] = flags & REDIR_BACKQ; in redirect() 165 openredirect(n, memory); in redirect() 169 if (memory[1]) in redirect() 171 if (memory[2]) in redirect() 178 openredirect(union node *redir, char memory[10]) in openredirect() 186 memory[fd] = 0; in openredirect() 231 if (memory[redir->ndup.dupfd]) in openredirect() 232 memory[fd] = 1; in openredirect()
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| /dflybsd-src/sys/dev/drm/ |
| H A D | drm_agpsupport.c | 240 entry->next = dev->agp->memory; in drm_agp_alloc() 241 if (dev->agp->memory) in drm_agp_alloc() 242 dev->agp->memory->prev = entry; in drm_agp_alloc() 243 dev->agp->memory = entry; in drm_agp_alloc() 284 for (entry = dev->agp->memory; entry; entry = entry->next) { in drm_agp_lookup_entry() 441 dev->agp->memory = entry->next; in drm_agp_free() 497 head->memory = NULL; in drm_agp_init() 529 for (entry = dev->agp->memory; entry; entry = nexte) { in drm_legacy_agp_clear() 536 dev->agp->memory = NULL; in drm_legacy_agp_clear()
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