Searched refs:h_sync_width (Results 1 – 15 of 15) sorted by relevance
167 uint32_t h_sync_width; member
428 crtc_timing->h_sync_width; in enc1_stream_encoder_dp_set_stream_attribute()431 h_active_start = crtc_timing->h_sync_width + h_back_porch; in enc1_stream_encoder_dp_set_stream_attribute()446 crtc_timing->h_sync_width, in enc1_stream_encoder_dp_set_stream_attribute()
209 OTG_H_SYNC_A_END, patched_crtc_timing.h_sync_width); in optc1_program_timing()577 if (timing->h_sync_width < optc1->min_h_sync_width || in optc1_validate_timing()
468 crtc_timing->h_sync_width; in dce110_stream_encoder_dp_set_stream_attribute()471 h_active_start = crtc_timing->h_sync_width + h_back_porch; in dce110_stream_encoder_dp_set_stream_attribute()489 crtc_timing->h_sync_width, in dce110_stream_encoder_dp_set_stream_attribute()
728 uint32_t h_sync_width; member
83 u8 h_sync_width; /* lower 8 bits (pixels) */ member
844 dtd->part2.h_sync_width = h_sync_len & 0xff; in intel_sdvo_get_dtd_from_mode()871 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; in intel_sdvo_get_mode_from_dtd()
317 bp_params.h_sync_width = patched_crtc_timing.h_sync_width; in dce110_timing_generator_program_timing_generator()1157 timing->h_sync_width); in dce110_timing_generator_validate_timing()
326 timing->h_sync_width, in dce110_timing_generator_v_program_blanking()
400 params.h_syncwidth = cpu_to_le16((uint16_t)bp_params->h_sync_width); in set_crtc_using_dtd_timing_v3()
1758 params.usH_SyncWidth = cpu_to_le16((uint16_t)(bp_params->h_sync_width)); in set_crtc_timing_v1()1843 params.usH_SyncWidth = cpu_to_le16((uint16_t)bp_params->h_sync_width); in set_crtc_using_dtd_timing_v3()
1049 le16_to_cpu(lvds->lcd_timing.h_sync_width); in get_embedded_panel_info_v2_1()
122 timing->h_sync_width < tg110->min_h_sync_width || in dce120_timing_generator_validate_timing()
435 uint16_t h_sync_width; member
2396 timing_out->h_sync_width = in fill_stream_properties_from_drm_display_mode()