Searched refs:dm_write_reg_soc15 (Results 1 – 2 of 2) sorted by relevance
| /dflybsd-src/sys/dev/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 271 dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0); in dce120_timing_generator_setup_global_swap_lock()
439 dm_write_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset, value); in dce120_timing_generator_disable_vga()
536 dm_write_reg_soc15( in dce120_timing_generator_set_overscan_color_black()
546 dm_write_reg_soc15( in dce120_timing_generator_set_overscan_color_black()
718 dm_write_reg_soc15(tg->ctx, in dce120_timing_generator_enable_advanced_request()
741 dm_write_reg_soc15( in dce120_tg_program_blank_color()
807 dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_BLANK_CONTROL, in dce120_tg_set_blank()
963 dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, 0); in dce120_timing_generator_set_test_pattern()
1002 dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); in dce120_timing_generator_set_test_pattern()
1015 dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); in dce120_timing_generator_set_test_pattern()
[all …]
|
| /dflybsd-src/sys/dev/drm/amd/display/dc/ |
| H A D | dm_services.h | 163 #define dm_write_reg_soc15(ctx, reg, inst_offset, value) \ macro
|