1 /* $NetBSD: tx39.c,v 1.45 2014/03/26 17:53:36 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.45 2014/03/26 17:53:36 christos Exp $");
34
35 #include "opt_vr41xx.h"
36 #include "opt_tx39xx.h"
37 #include "m38813c.h"
38 #include "tc5165buf.h"
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/intr.h>
43
44 #include <uvm/uvm_extern.h>
45
46 #include <mips/cache.h>
47 #include <mips/locore.h>
48
49 #include <machine/bootinfo.h> /* bootinfo */
50 #include <machine/sysconf.h> /* platform */
51
52 #include <machine/platid.h>
53 #include <machine/platid_mask.h>
54
55 #include <machine/bus.h>
56
57 #include <hpcmips/tx/tx39biureg.h>
58 #include <hpcmips/tx/tx39reg.h>
59 #include <hpcmips/tx/tx39var.h>
60 #ifdef TX391X
61 #include <hpcmips/tx/tx3912videovar.h>
62 #endif
63
64 #include <sys/termios.h>
65 #include <sys/ttydefaults.h>
66 #include <hpcmips/tx/tx39uartvar.h>
67 #ifndef CONSPEED
68 #define CONSPEED TTYDEF_SPEED
69 #endif
70
71 /* console keyboard */
72 #if NM38813C > 0
73 #include <hpcmips/dev/m38813cvar.h>
74 #endif
75 #if NTC5165BUF > 0
76 #include <hpcmips/dev/tc5165bufvar.h>
77 #endif
78
79 struct tx_chipset_tag tx_chipset;
80
81 void tx_init(void);
82 #if defined(VR41XX) && defined(TX39XX)
83 #define TX_INTR tx_intr
84 #else
85 #define TX_INTR cpu_intr /* locore_mips3 directly call this */
86 #endif
87
88 extern void TX_INTR(int, vaddr_t, uint32_t);
89
90 void tx39clock_cpuspeed(int *, int *);
91
92 /* TX39-specific initialization vector */
93 void tx_cons_init(void);
94 void tx_fb_init(void **);
95 void tx_mem_init(paddr_t);
96 void tx_find_dram(paddr_t, paddr_t);
97 void tx_reboot(int, char *);
98
99 void
tx_init(void)100 tx_init(void)
101 {
102 tx_chipset_tag_t tc;
103 int model, rev;
104 int cpuclock;
105
106 tc = tx_conf_get_tag();
107 /*
108 * Platform Specific Function Hooks
109 */
110 platform.cpu_intr = TX_INTR;
111 platform.cpu_idle = NULL; /* not implemented yet */
112 platform.cons_init = tx_cons_init;
113 platform.fb_init = tx_fb_init;
114 platform.mem_init = tx_mem_init;
115 platform.reboot = tx_reboot;
116
117
118 model = MIPS_PRID_REV(mips_options.mips_cpu_id);
119
120 switch (model) {
121 default:
122 /* Unknown TOSHIBA TX39-series */
123 cpuname_printf("Unknown TOSHIBA TX39-series %x", model);
124 break;
125 case TMPR3912:
126 tx39clock_cpuspeed(&cpuclock, &cpuspeed);
127
128 cpuname_printf("TOSHIBA TMPR3912 %d.%02d MHz",
129 cpuclock / 1000000, (cpuclock % 1000000) / 10000);
130 tc->tc_chipset = __TX391X;
131 break;
132 case TMPR3922:
133 tx39clock_cpuspeed(&cpuclock, &cpuspeed);
134 rev = tx_conf_read(tc, TX3922_REVISION_REG);
135
136 cpuname_printf("TOSHIBA TMPR3922 rev. %x.%x "
137 "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
138 cpuclock / 1000000, (cpuclock % 1000000) / 10000);
139 tc->tc_chipset = __TX392X;
140 break;
141 }
142 }
143
144 void
tx_fb_init(void ** kernend)145 tx_fb_init(void **kernend)
146 {
147 #ifdef TX391X
148 paddr_t fb_end;
149
150 fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
151 mem_clusters[0].size - 1);
152 tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
153
154 /* Skip V-RAM area */
155 *kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
156 #endif /* TX391X */
157 #ifdef TX392X
158 /*
159 * Plum V-RAM isn't accessible until pmap_bootstrap,
160 * at this time, frame buffer device is disabled.
161 */
162 bootinfo->fb_addr = 0;
163 #endif /* TX392X */
164 }
165
166 void
tx_mem_init(paddr_t kernend)167 tx_mem_init(paddr_t kernend)
168 {
169
170 mem_clusters[0].start = 0;
171 mem_clusters[0].size = kernend;
172 mem_cluster_cnt = 1;
173 /* search DRAM bank 0 */
174 tx_find_dram(kernend, 0x02000000);
175
176 /* search DRAM bank 1 */
177 tx_find_dram(0x02000000, 0x04000000);
178 }
179
180 void
tx_find_dram(paddr_t start,paddr_t end)181 tx_find_dram(paddr_t start, paddr_t end)
182 {
183 char *page, *startaddr, *endaddr;
184 uint32_t magic0, magic1;
185 #define MAGIC0 (*(volatile uint32_t *)(page + 0))
186 #define MAGIC1 (*(volatile uint32_t *)(page + 4))
187
188 startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
189 endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
190
191 page = startaddr;
192 if (badaddr(page, 4))
193 return;
194
195 do {
196 magic0 = random();
197 magic1 = random();
198 } while (MAGIC0 == magic0 || MAGIC0 == magic1);
199
200 MAGIC0 = magic0;
201 MAGIC1 = magic1;
202 wbflush();
203
204 if (MAGIC0 != magic0 || MAGIC1 != magic1)
205 return;
206
207 for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
208 if (badaddr(page, 4))
209 return;
210 if (MAGIC0 == magic0 &&
211 MAGIC1 == magic1) {
212 goto memend_found;
213 }
214 }
215
216 /* check for 32MByte memory */
217 page -= PAGE_SIZE;
218 MAGIC0 = magic0;
219 MAGIC1 = magic1;
220 wbflush();
221 if (MAGIC0 != magic0 || MAGIC1 != magic1)
222 return; /* no memory in this bank */
223
224 memend_found:
225 mem_clusters[mem_cluster_cnt].start = start;
226 mem_clusters[mem_cluster_cnt].size = page - startaddr;
227
228 /* skip kernel area */
229 if (mem_cluster_cnt == 1)
230 mem_clusters[mem_cluster_cnt].size -= start;
231
232 mem_cluster_cnt++;
233 #undef MAGIC0
234 #undef MAGIC1
235 }
236
237 void
tx_reboot(int howto,char * bootstr)238 tx_reboot(int howto, char *bootstr)
239 {
240
241 goto *(uint32_t *)MIPS_RESET_EXC_VEC;
242 }
243
244 void
tx_cons_init(void)245 tx_cons_init(void)
246 {
247 int slot;
248 #define CONSPLATIDMATCH(p) \
249 platid_match(&platid, &platid_mask_MACH_##p)
250
251 #ifdef SERIALCONSSLOT
252 slot = SERIALCONSSLOT;
253 #else
254 slot = TX39_UARTA;
255 #endif
256 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
257 if(txcom_cnattach(slot, CONSPEED,
258 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
259 panic("tx_cons_init: can't attach serial console.");
260 }
261 } else {
262 #if NM38813C > 0
263 if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
264 m38813c_cnattach(TX39_SYSADDR_CARD1)) {
265 goto panic;
266 }
267 #endif
268 #if NTC5165BUF > 0
269 if(CONSPLATIDMATCH(COMPAQ_C) &&
270 tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
271 goto panic;
272 }
273
274 if(CONSPLATIDMATCH(SHARP_TELIOS) &&
275 tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
276 goto panic;
277 }
278
279 if(CONSPLATIDMATCH(SHARP_MOBILON) &&
280 tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
281 goto panic;
282 }
283 #endif
284 }
285
286 return;
287 #if (NM38813C > 0) || (NTC5165BUF > 0)
288 panic:
289 #endif
290 panic("tx_cons_init: can't init console");
291 /* NOTREACHED */
292 }
293
294 void
tx_conf_register_intr(tx_chipset_tag_t t,void * intrt)295 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
296 {
297
298 KASSERT(t == &tx_chipset);
299 tx_chipset.tc_intrt = intrt;
300 }
301
302 void
tx_conf_register_power(tx_chipset_tag_t t,void * powert)303 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
304 {
305
306 KASSERT(t == &tx_chipset);
307 tx_chipset.tc_powert = powert;
308 }
309
310 void
tx_conf_register_clock(tx_chipset_tag_t t,void * clockt)311 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
312 {
313
314 KASSERT(t == &tx_chipset);
315 tx_chipset.tc_clockt = clockt;
316 }
317
318 void
tx_conf_register_sound(tx_chipset_tag_t t,void * soundt)319 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
320 {
321
322 KASSERT(t == &tx_chipset);
323 tx_chipset.tc_soundt = soundt;
324 }
325
326 void
tx_conf_register_video(tx_chipset_tag_t t,void * videot)327 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
328 {
329
330 KASSERT(t == &tx_chipset);
331 tx_chipset.tc_videot = videot;
332 }
333