1 #include <u.h>
2 #include <libc.h>
3 #include <bio.h>
4
5 #include "pci.h"
6 #include "vga.h"
7
8 /*
9 * Tvp3025 Viewpoint Video Interface Pallette.
10 * Assumes hooked up to an S3 Vision964.
11 * The #9GXE64pro uses bit 5 of Crt5C as RS4,
12 * giving access to the Bt485 emulation mode registers.
13 */
14 static void
options(Vga * vga,Ctlr * ctlr)15 options(Vga* vga, Ctlr* ctlr)
16 {
17 tvp3020.options(vga, ctlr);
18 }
19
20 static void
init(Vga * vga,Ctlr * ctlr)21 init(Vga* vga, Ctlr* ctlr)
22 {
23 /*
24 * Although the Tvp3025 has a higher default
25 * speed-grade (135MHz), just use the 3020 code.
26 */
27 tvp3020.init(vga, ctlr);
28 }
29
30 static void
load(Vga * vga,Ctlr * ctlr)31 load(Vga* vga, Ctlr* ctlr)
32 {
33 uchar crt5c, x;
34
35 crt5c = vgaxi(Crtx, 0x5C) & ~0x20;
36 vgaxo(Crtx, 0x5C, crt5c);
37 x = tvp3020xi(0x06) & ~0x80;
38 tvp3020xo(0x06, x);
39 tvp3020xo(0x0E, 0x00);
40
41 (tvp3020.load)(vga, ctlr);
42 if(ctlr->flag & Uenhanced)
43 tvp3020xo(0x29, 0x01);
44
45 ctlr->flag |= Fload;
46 }
47
48 static ulong
dumpclock(ulong d,ulong n,ulong p)49 dumpclock(ulong d, ulong n, ulong p)
50 {
51 ulong f;
52
53 f = RefFreq*((n+2)*8);
54 f /= (d+2);
55 f >>= p;
56
57 return f;
58 }
59
60 static void
dump(Vga * vga,Ctlr * ctlr)61 dump(Vga* vga, Ctlr* ctlr)
62 {
63 uchar crt5c;
64 int i;
65 ulong clock[4];
66
67 crt5c = vgaxi(Crtx, 0x5C);
68 vgaxo(Crtx, 0x5C, crt5c & ~0x20);
69 tvp3020.dump(vga, ctlr);
70
71 printitem(ctlr->name, "PCLK");
72 for(i = 0; i < 4; i++){
73 tvp3020xo(0x2C, (i<<4)|(i<<2)|i);
74 printreg(clock[i] = tvp3020xi(0x2D));
75 }
76 Bprint(&stdout, "%23ld\n", dumpclock(clock[0], clock[1], clock[2] & 0x07));
77
78 printitem(ctlr->name, "MCLK");
79 for(i = 0; i < 4; i++){
80 tvp3020xo(0x2C, (i<<4)|(i<<2)|i);
81 printreg(clock[i] = tvp3020xi(0x2E));
82 }
83 Bprint(&stdout, "%23ld\n", dumpclock(clock[0], clock[1], clock[2] & 0x07));
84
85 printitem(ctlr->name, "RCLK");
86 for(i = 0; i < 4; i++){
87 tvp3020xo(0x2C, (i<<4)|(i<<2)|i);
88 printreg(clock[i] = tvp3020xi(0x2F));
89 }
90 Bprint(&stdout, "%23ld\n", dumpclock(clock[0], clock[1], clock[2] & 0x07));
91
92 vgaxo(Crtx, 0x5C, crt5c);
93 }
94
95 Ctlr tvp3025 = {
96 "tvp3025", /* name */
97 0, /* snarf */
98 options, /* options */
99 init, /* init */
100 load, /* load */
101 dump, /* dump */
102 };
103