1 /* $NetBSD: tft_plb.c,v 1.5 2011/07/01 19:03:50 dyoung Exp $ */
2
3 /*
4 * Copyright (c) 2006 Jachym Holecek
5 * All rights reserved.
6 *
7 * Written for DFC Design, s.r.o.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 *
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tft_plb.c,v 1.5 2011/07/01 19:03:50 dyoung Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/mbuf.h>
38 #include <sys/kernel.h>
39 #include <sys/socket.h>
40 #include <sys/ioctl.h>
41 #include <sys/device.h>
42 #include <sys/queue.h>
43
44 #include <uvm/uvm_extern.h>
45
46 #include <sys/bus.h>
47
48 #include <dev/wscons/wsdisplayvar.h>
49 #include <dev/wscons/wsconsio.h>
50 #include <dev/rasops/rasops.h>
51 #include <dev/wscons/wsdisplay_vconsvar.h>
52
53 #include <evbppc/virtex/dev/xcvbusvar.h>
54 #include <evbppc/virtex/dev/tftreg.h>
55 #include <evbppc/virtex/dev/tftvar.h>
56
57
58 struct plb_tft_softc {
59 struct tft_softc psc_sc;
60
61 bus_dma_tag_t psc_dmat;
62 bus_dmamap_t psc_dmap; /* for psc_sc.sc_image */
63 bus_dma_segment_t psc_seg;
64
65 void *sc_sdhook; /* stop DMA */
66 };
67
68 static void plb_tft_attach(device_t, device_t, void *);
69 static paddr_t plb_tft_mmap(void *, void *, off_t, int);
70
71 CFATTACH_DECL_NEW(plb_tft, sizeof(struct plb_tft_softc),
72 xcvbus_child_match, plb_tft_attach, NULL, NULL);
73
74
75 /* Patched by tft_attach(), may be shared by all instances. */
76 static struct wsdisplay_accessops plb_tft_accessops = {
77 .mmap = plb_tft_mmap,
78 };
79
80
81 /*
82 * Generic device.
83 */
84 static void
plb_tft_attach(device_t parent,device_t self,void * aux)85 plb_tft_attach(device_t parent, device_t self, void *aux)
86 {
87 struct xcvbus_attach_args *vaa = aux;
88 struct plb_tft_softc *psc = device_private(self);
89 struct tft_softc *sc = &psc->psc_sc;
90 int nseg, error;
91
92 psc->psc_dmat = vaa->vaa_dmat;
93 sc->sc_iot = vaa->vaa_iot;
94 sc->sc_dev = self;
95
96 aprint_normal(": PLB_TFT\n");
97
98 if ((error = bus_space_map(sc->sc_iot, vaa->vaa_addr, TFT_SIZE,
99 0, &sc->sc_ioh)) != 0) {
100 aprint_error_dev(self, "could not map device registers\n");
101 goto fail_0;
102 }
103
104 /* Fill in resolution, depth, size. */
105 tft_mode(self);
106
107 /* Allocate and map framebuffer control data. */
108 if ((error = bus_dmamem_alloc(psc->psc_dmat, sc->sc_size, ADDR_ALIGN,
109 0, &psc->psc_seg, 1, &nseg, 0)) != 0) {
110 aprint_error_dev(self, "could not allocate framebuffer\n");
111 goto fail_1;
112 }
113 if ((error = bus_dmamem_map(psc->psc_dmat, &psc->psc_seg, nseg,
114 sc->sc_size, &sc->sc_image, BUS_DMA_COHERENT)) != 0) {
115 aprint_error_dev(self, "could not map framebuffer\n");
116 goto fail_2;
117 }
118 if ((error = bus_dmamap_create(psc->psc_dmat, sc->sc_size, 1,
119 sc->sc_size, 0, 0, &psc->psc_dmap)) != 0) {
120 aprint_error_dev(self, "could not create framebuffer DMA map\n");
121 goto fail_3;
122 }
123 if ((error = bus_dmamap_load(psc->psc_dmat, psc->psc_dmap,
124 sc->sc_image, sc->sc_size, NULL, 0)) != 0) {
125 aprint_error_dev(self, "could not load framebuffer DMA map\n");
126 goto fail_4;
127 }
128 /* XXX hack, we linear map whole RAM and we have single segment */
129 /* sc->sc_image = (void *)psc->psc_dmap->dm_segs[0].ds_addr; */
130 /* XXX hack, use predefined base addr */
131 sc->sc_image = (void *)(uintptr_t)0x3c00000;
132
133 /* XXX forget the hack above, use "virtex-tft-framebuffer-base" prop */
134
135 tft_attach(self, &plb_tft_accessops);
136
137 aprint_normal_dev(self, "video memory pa 0x%08x\n",
138 (uint32_t)psc->psc_dmap->dm_segs[0].ds_addr);
139
140 #if 0
141 /* XXX powerpc bus_dma doesn't support COHERENT. */
142 bus_dmamap_sync(psc->psc_dmat, psc->psc_dmap, 0,
143 sc->sc_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
144 #endif
145
146 bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_RESET);
147 bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_ENABLE);
148
149 #if 0
150 /* XXX how do we change framebuffer base? */
151 bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_RESET);
152 bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_ENABLE);
153 bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_ADDR,
154 ADDR_MAKE(psc->psc_dmap->dm_segs[0].ds_addr));
155 #endif
156
157 return ;
158
159 fail_4:
160 bus_dmamap_destroy(psc->psc_dmat, psc->psc_dmap);
161 fail_3:
162 bus_dmamem_unmap(psc->psc_dmat, sc->sc_image, sc->sc_size);
163 fail_2:
164 bus_dmamem_free(psc->psc_dmat, &psc->psc_seg, nseg);
165 fail_1:
166 bus_space_unmap(sc->sc_iot, sc->sc_ioh, TFT_SIZE);
167 fail_0:
168 aprint_error_dev(self, "error %d\n", error);
169 }
170
171 static paddr_t
plb_tft_mmap(void * arg,void * scr,off_t offs,int prot)172 plb_tft_mmap(void *arg, void *scr, off_t offs, int prot)
173 {
174 struct vcons_data *vc = arg;
175 struct plb_tft_softc *psc = vc->cookie;
176 paddr_t pa = -1;
177
178 #if 0 /* XXX hack */
179 if (offs < psc->psc_sc.sc_size)
180 pa = bus_dmamem_mmap(psc->psc_dmat, &psc->psc_seg, 1,
181 offs, prot, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
182 #endif
183 if (offs < psc->psc_sc.sc_size)
184 pa = (paddr_t)(intptr_t)psc->psc_sc.sc_image + offs;
185
186 return (pa);
187 }
188