xref: /llvm-project/llvm/test/CodeGen/X86/stackmap.ll (revision 2b63077cfa13095b3e64f79fe825cc85ca9da7be) 
1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
2;
3; Note: Print verbose stackmaps using -debug-only=stackmaps.
4
5; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
6; CHECK-NEXT:  __LLVM_StackMaps:
7; Header
8; CHECK-NEXT:   .byte 3
9; CHECK-NEXT:   .byte 0
10; CHECK-NEXT:   .short 0
11; Num Functions
12; CHECK-NEXT:   .long 16
13; Num LargeConstants
14; CHECK-NEXT:   .long 4
15; Num Callsites
16; CHECK-NEXT:   .long 20
17
18; Functions and stack size
19; CHECK-NEXT:   .quad _constantargs
20; CHECK-NEXT:   .quad 8
21; CHECK-NEXT:   .quad 1
22; CHECK-NEXT:   .quad _osrinline
23; CHECK-NEXT:   .quad 24
24; CHECK-NEXT:   .quad 1
25; CHECK-NEXT:   .quad _osrcold
26; CHECK-NEXT:   .quad 8
27; CHECK-NEXT:   .quad 1
28; CHECK-NEXT:   .quad _propertyRead
29; CHECK-NEXT:   .quad 8
30; CHECK-NEXT:   .quad 1
31; CHECK-NEXT:   .quad _propertyWrite
32; CHECK-NEXT:   .quad 8
33; CHECK-NEXT:   .quad 1
34; CHECK-NEXT:   .quad _jsVoidCall
35; CHECK-NEXT:   .quad 8
36; CHECK-NEXT:   .quad 1
37; CHECK-NEXT:   .quad _jsIntCall
38; CHECK-NEXT:   .quad 8
39; CHECK-NEXT:   .quad 1
40; CHECK-NEXT:   .quad _spilledValue
41; CHECK-NEXT:   .quad 8
42; CHECK-NEXT:   .quad 1
43; CHECK-NEXT:   .quad _spillSubReg
44; CHECK-NEXT:   .quad 56
45; CHECK-NEXT:   .quad 1
46; CHECK-NEXT:   .quad _subRegOffset
47; CHECK-NEXT:   .quad 56
48; CHECK-NEXT:   .quad 1
49; CHECK-NEXT:   .quad _liveConstant
50; CHECK-NEXT:   .quad 8
51; CHECK-NEXT:   .quad 1
52; CHECK-NEXT:   .quad _directFrameIdx
53; CHECK-NEXT:   .quad 56
54; CHECK-NEXT:   .quad 2
55; CHECK-NEXT:   .quad _longid
56; CHECK-NEXT:   .quad 8
57; CHECK-NEXT:   .quad 4
58; CHECK-NEXT:   .quad _clobberScratch
59; CHECK-NEXT:   .quad 56
60; CHECK-NEXT:   .quad 1
61; CHECK-NEXT:   .quad _needsStackRealignment
62; CHECK-NEXT:   .quad -1
63; CHECK-NEXT:   .quad 1
64; CHECK-NEXT:   .quad _floats
65; CHECK-NEXT:   .quad 24
66; CHECK-NEXT:   .quad 1
67
68; Large Constants
69; CHECK-NEXT:   .quad   2147483648
70; CHECK-NEXT:   .quad   4294967295
71; CHECK-NEXT:   .quad   4294967296
72; CHECK-NEXT:   .quad   4294967297
73
74; Callsites
75; Constant arguments
76;
77; CHECK-NEXT:   .quad   1
78; CHECK-NEXT:   .long   L{{.*}}-_constantargs
79; CHECK-NEXT:   .short  0
80; CHECK-NEXT:   .short  14
81; SmallConstant
82; CHECK-NEXT:   .byte   4
83; CHECK-NEXT:   .byte   0
84; CHECK-NEXT:   .short  8
85; CHECK-NEXT:   .short  0
86; CHECK-NEXT:   .short  0
87; CHECK-NEXT:   .long   -1
88; SmallConstant
89; CHECK-NEXT:   .byte   4
90; CHECK-NEXT:   .byte   0
91; CHECK-NEXT:   .short  8
92; CHECK-NEXT:   .short  0
93; CHECK-NEXT:   .short  0
94; CHECK-NEXT:   .long   -1
95; SmallConstant
96; CHECK-NEXT:   .byte   4
97; CHECK-NEXT:   .byte   0
98; CHECK-NEXT:   .short  8
99; CHECK-NEXT:   .short  0
100; CHECK-NEXT:   .short  0
101; CHECK-NEXT:   .long   65536
102; SmallConstant
103; CHECK-NEXT:   .byte   4
104; CHECK-NEXT:   .byte   0
105; CHECK-NEXT:   .short  8
106; CHECK-NEXT:   .short  0
107; CHECK-NEXT:   .short  0
108; CHECK-NEXT:   .long   2000000000
109; SmallConstant
110; CHECK-NEXT:   .byte   4
111; CHECK-NEXT:   .byte   0
112; CHECK-NEXT:   .short  8
113; CHECK-NEXT:   .short  0
114; CHECK-NEXT:   .short  0
115; CHECK-NEXT:   .long   2147483647
116; SmallConstant
117; CHECK-NEXT:   .byte   4
118; CHECK-NEXT:   .byte   0
119; CHECK-NEXT:   .short  8
120; CHECK-NEXT:   .short  0
121; CHECK-NEXT:   .short  0
122; CHECK-NEXT:   .long   -1
123; SmallConstant
124; CHECK-NEXT:   .byte   4
125; CHECK-NEXT:   .byte   0
126; CHECK-NEXT:   .short  8
127; CHECK-NEXT:   .short  0
128; CHECK-NEXT:   .short  0
129; CHECK-NEXT:   .long   -1
130; SmallConstant
131; CHECK-NEXT:   .byte   4
132; CHECK-NEXT:   .byte   0
133; CHECK-NEXT:   .short  8
134; CHECK-NEXT:   .short  0
135; CHECK-NEXT:   .short  0
136; CHECK-NEXT:   .long   0
137; LargeConstant at index 0
138; CHECK-NEXT:   .byte   5
139; CHECK-NEXT:   .byte   0
140; CHECK-NEXT:   .short  8
141; CHECK-NEXT:   .short  0
142; CHECK-NEXT:   .short  0
143; CHECK-NEXT:   .long   0
144; LargeConstant at index 1
145; CHECK-NEXT:   .byte   5
146; CHECK-NEXT:   .byte   0
147; CHECK-NEXT:   .short  8
148; CHECK-NEXT:   .short  0
149; CHECK-NEXT:   .short  0
150; CHECK-NEXT:   .long   1
151; LargeConstant at index 2
152; CHECK-NEXT:   .byte   5
153; CHECK-NEXT:   .byte   0
154; CHECK-NEXT:   .short  8
155; CHECK-NEXT:   .short  0
156; CHECK-NEXT:   .short  0
157; CHECK-NEXT:   .long   2
158; SmallConstant
159; CHECK-NEXT:   .byte   4
160; CHECK-NEXT:   .byte   0
161; CHECK-NEXT:   .short  8
162; CHECK-NEXT:   .short  0
163; CHECK-NEXT:   .short  0
164; CHECK-NEXT:   .long   -1
165; SmallConstant
166; CHECK-NEXT:   .byte   4
167; CHECK-NEXT:   .byte   0
168; CHECK-NEXT:   .short  8
169; CHECK-NEXT:   .short  0
170; CHECK-NEXT:   .short  0
171; CHECK-NEXT:   .long   66
172; LargeConstant at index 3
173; CHECK-NEXT:   .byte   5
174; CHECK-NEXT:   .byte   0
175; CHECK-NEXT:   .short  8
176; CHECK-NEXT:   .short  0
177; CHECK-NEXT:   .short  0
178; CHECK-NEXT:   .long   3
179
180define void @constantargs() {
181entry:
182  %0 = inttoptr i64 12345 to ptr
183  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 15, ptr %0, i32 0, i16 65535, i16 -1, i32 65536, i32 2000000000, i32 2147483647, i32 -1, i32 4294967295, i32 4294967296, i64 2147483648, i64 4294967295, i64 4294967296, i64 -1, i128 66, i128 4294967297)
184  ret void
185}
186
187; Inline OSR Exit
188;
189; CHECK-LABEL:  .long   L{{.*}}-_osrinline
190; CHECK-NEXT:   .short  0
191; CHECK-NEXT:   .short  2
192; CHECK-NEXT:   .byte   1
193; CHECK-NEXT:   .byte   0
194; CHECK-NEXT:   .short  8
195; CHECK-NEXT:   .short  {{[0-9]+}}
196; CHECK-NEXT:   .short  0
197; CHECK-NEXT:   .long   0
198; CHECK-NEXT:   .byte   1
199; CHECK-NEXT:   .byte   0
200; CHECK-NEXT:   .short  8
201; CHECK-NEXT:   .short  {{[0-9]+}}
202; CHECK-NEXT:   .short  0
203; CHECK-NEXT:   .long  0
204define void @osrinline(i64 %a, i64 %b) {
205entry:
206  ; Runtime void->void call.
207  call void inttoptr (i64 -559038737 to ptr)()
208  ; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars.
209  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b)
210  ret void
211}
212
213; Cold OSR Exit
214;
215; 2 live variables in register.
216;
217; CHECK-LABEL:  .long   L{{.*}}-_osrcold
218; CHECK-NEXT:   .short  0
219; CHECK-NEXT:   .short  2
220; CHECK-NEXT:   .byte   1
221; CHECK-NEXT:   .byte   0
222; CHECK-NEXT:   .short  8
223; CHECK-NEXT:   .short  {{[0-9]+}}
224; CHECK-NEXT:   .short  0
225; CHECK-NEXT:   .long   0
226; CHECK-NEXT:   .byte   1
227; CHECK-NEXT:   .byte   0
228; CHECK-NEXT:   .short  8
229; CHECK-NEXT:   .short  {{[0-9]+}}
230; CHECK-NEXT:   .short  0
231; CHECK-NEXT:   .long   0
232define void @osrcold(i64 %a, i64 %b) {
233entry:
234  %test = icmp slt i64 %a, %b
235  br i1 %test, label %ret, label %cold
236cold:
237  ; OSR patchpoint with 12-byte nop-slide and 2 live vars.
238  %thunk = inttoptr i64 -559038737 to ptr
239  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4, i32 15, ptr %thunk, i32 0, i64 %a, i64 %b)
240  unreachable
241ret:
242  ret void
243}
244
245; Property Read
246; CHECK-LABEL:  .long   L{{.*}}-_propertyRead
247; CHECK-NEXT:   .short  0
248; CHECK-NEXT:   .short  2
249; CHECK-NEXT:   .byte   1
250; CHECK-NEXT:   .byte   0
251; CHECK-NEXT:   .short  8
252; CHECK-NEXT:   .short  {{[0-9]+}}
253; CHECK-NEXT:   .short  0
254; CHECK-NEXT:   .long   0
255; CHECK-NEXT:   .byte   1
256; CHECK-NEXT:   .byte   0
257; CHECK-NEXT:   .short  8
258; CHECK-NEXT:   .short  {{[0-9]+}}
259; CHECK-NEXT:   .short  0
260; CHECK-NEXT:   .long   0
261define i64 @propertyRead(ptr %obj) {
262entry:
263  %resolveRead = inttoptr i64 -559038737 to ptr
264  %result = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 15, ptr %resolveRead, i32 1, ptr %obj)
265  %add = add i64 %result, 3
266  ret i64 %add
267}
268
269; Property Write
270; CHECK-LABEL:  .long   L{{.*}}-_propertyWrite
271; CHECK-NEXT:   .short  0
272; CHECK-NEXT:   .short  2
273; CHECK-NEXT:   .byte   1
274; CHECK-NEXT:   .byte   0
275; CHECK-NEXT:   .short  8
276; CHECK-NEXT:   .short  {{[0-9]+}}
277; CHECK-NEXT:   .short  0
278; CHECK-NEXT:   .long   0
279; CHECK-NEXT:   .byte   1
280; CHECK-NEXT:   .byte   0
281; CHECK-NEXT:   .short  8
282; CHECK-NEXT:   .short  {{[0-9]+}}
283; CHECK-NEXT:   .short  0
284; CHECK-NEXT:   .long   0
285define void @propertyWrite(i64 %dummy1, ptr %obj, i64 %dummy2, i64 %a) {
286entry:
287  %resolveWrite = inttoptr i64 -559038737 to ptr
288  call anyregcc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 15, ptr %resolveWrite, i32 2, ptr %obj, i64 %a)
289  ret void
290}
291
292; Void JS Call
293;
294; 2 live variables in registers.
295;
296; CHECK-LABEL:  .long   L{{.*}}-_jsVoidCall
297; CHECK-NEXT:   .short  0
298; CHECK-NEXT:   .short  2
299; CHECK-NEXT:   .byte   1
300; CHECK-NEXT:   .byte   0
301; CHECK-NEXT:   .short  8
302; CHECK-NEXT:   .short  {{[0-9]+}}
303; CHECK-NEXT:   .short  0
304; CHECK-NEXT:   .long   0
305; CHECK-NEXT:   .byte   1
306; CHECK-NEXT:   .byte   0
307; CHECK-NEXT:   .short  8
308; CHECK-NEXT:   .short  {{[0-9]+}}
309; CHECK-NEXT:   .short  0
310; CHECK-NEXT:   .long   0
311define void @jsVoidCall(i64 %dummy1, ptr %obj, i64 %arg, i64 %l1, i64 %l2) {
312entry:
313  %resolveCall = inttoptr i64 -559038737 to ptr
314  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 7, i32 15, ptr %resolveCall, i32 2, ptr %obj, i64 %arg, i64 %l1, i64 %l2)
315  ret void
316}
317
318; i64 JS Call
319;
320; 2 live variables in registers.
321;
322; CHECK-LABEL:  .long   L{{.*}}-_jsIntCall
323; CHECK-NEXT:   .short  0
324; CHECK-NEXT:   .short  2
325; CHECK-NEXT:   .byte   1
326; CHECK-NEXT:   .byte   0
327; CHECK-NEXT:   .short  8
328; CHECK-NEXT:   .short  {{[0-9]+}}
329; CHECK-NEXT:   .short  0
330; CHECK-NEXT:   .long   0
331; CHECK-NEXT:   .byte   1
332; CHECK-NEXT:   .byte   0
333; CHECK-NEXT:   .short  8
334; CHECK-NEXT:   .short  {{[0-9]+}}
335; CHECK-NEXT:   .short  0
336; CHECK-NEXT:   .long   0
337define i64 @jsIntCall(i64 %dummy1, ptr %obj, i64 %arg, i64 %l1, i64 %l2) {
338entry:
339  %resolveCall = inttoptr i64 -559038737 to ptr
340  %result = call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 8, i32 15, ptr %resolveCall, i32 2, ptr %obj, i64 %arg, i64 %l1, i64 %l2)
341  %add = add i64 %result, 3
342  ret i64 %add
343}
344
345; Spilled stack map values.
346;
347; Verify 17 stack map entries.
348;
349; CHECK-LABEL:  .long L{{.*}}-_spilledValue
350; CHECK-NEXT:   .short 0
351; CHECK-NEXT:   .short 17
352;
353; Check that at least one is a spilled entry from RBP.
354; Location: Indirect RBP + ...
355; CHECK:        .byte 3
356; CHECK-NEXT:   .byte 0
357; CHECK-NEXT:   .short 8
358; CHECK-NEXT:   .short 6
359; CHECK-NEXT:   .short 0
360; CHECK-NEXT:   .long
361define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
362entry:
363  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 15, ptr null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
364  ret void
365}
366
367; Spill a subregister stackmap operand.
368;
369; CHECK-LABEL:  .long L{{.*}}-_spillSubReg
370; CHECK-NEXT:   .short 0
371; 4 locations
372; CHECK-NEXT:   .short 1
373;
374; Check that the subregister operand is a 4-byte spill.
375; Location: Indirect, 4-byte, RBP + ...
376; CHECK:        .byte 3
377; CHECK-NEXT:   .byte 0
378; CHECK-NEXT:   .short 4
379; CHECK-NEXT:   .short 6
380; CHECK-NEXT:   .short 0
381; CHECK-NEXT:   .long
382define void @spillSubReg(i64 %arg, i1 %arg2) #0 {
383bb:
384  br i1 %arg2, label %bb1, label %bb2
385
386bb1:
387  unreachable
388
389bb2:
390  %tmp = load i64, ptr inttoptr (i64 140685446136880 to ptr)
391  br i1 %arg2, label %bb16, label %bb17
392
393bb16:
394  unreachable
395
396bb17:
397  %tmp32 = trunc i64 %tmp to i32
398  br i1 %arg2, label %bb60, label %bb61
399
400bb60:
401  tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
402  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 13, i32 5, i32 %tmp32)
403  unreachable
404
405bb61:
406  unreachable
407}
408
409; Map a single byte subregister. There is no DWARF register number, so
410; we expect the register to be encoded with the proper size and spill offset. We don't know which
411;
412; CHECK-LABEL:  .long L{{.*}}-_subRegOffset
413; CHECK-NEXT:   .short 0
414; 2 locations
415; CHECK-NEXT:   .short 2
416;
417; Check that the subregister operands are 1-byte spills.
418; Location 0: Register, 4-byte, AL
419; CHECK-NEXT:   .byte 1
420; CHECK-NEXT:   .byte   0
421; CHECK-NEXT:   .short 1
422; CHECK-NEXT:   .short 0
423; CHECK-NEXT:   .short  0
424; CHECK-NEXT:   .long 0
425;
426; Location 1: Register, 4-byte, BL
427; CHECK-NEXT:   .byte 1
428; CHECK-NEXT:   .byte 0
429; CHECK-NEXT:   .short 1
430; CHECK-NEXT:   .short 3
431; CHECK-NEXT:   .short 0
432; CHECK-NEXT:   .long 0
433define void @subRegOffset(i16 %arg) {
434  %v = mul i16 %arg, 5
435  %a0 = trunc i16 %v to i8
436  tail call void asm sideeffect "nop", "~{bx}"() nounwind
437  %arghi = lshr i16 %v, 8
438  %a1 = trunc i16 %arghi to i8
439  tail call void asm sideeffect "nop", "~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
440  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 5, i8 %a0, i8 %a1)
441  ret void
442}
443
444; Map a constant value.
445;
446; CHECK-LABEL:  .long L{{.*}}-_liveConstant
447; CHECK-NEXT:   .short 0
448; 1 location
449; CHECK-NEXT:   .short 1
450; Loc 0: SmallConstant
451; CHECK-NEXT:   .byte   4
452; CHECK-NEXT:   .byte   0
453; CHECK-NEXT:   .short  8
454; CHECK-NEXT:   .short  0
455; CHECK-NEXT:   .short  0
456; CHECK-NEXT:   .long   33
457
458define void @liveConstant() {
459  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 15, i32 5, i32 33)
460  ret void
461}
462
463; Directly map an alloca's address.
464;
465; Callsite 16
466; CHECK-LABEL:  .long L{{.*}}-_directFrameIdx
467; CHECK-NEXT:   .short 0
468; 1 location
469; CHECK-NEXT:   .short	1
470; Loc 0: Direct RBP - ofs
471; CHECK-NEXT:   .byte	2
472; CHECK-NEXT:   .byte	0
473; CHECK-NEXT:   .short	8
474; CHECK-NEXT:   .short	6
475; CHECK-NEXT:   .short	0
476; CHECK-NEXT:   .long
477
478; Callsite 17
479; CHECK-LABEL:  .long	L{{.*}}-_directFrameIdx
480; CHECK-NEXT:   .short	0
481; 2 locations
482; CHECK-NEXT:   .short	2
483; Loc 0: Direct RBP - ofs
484; CHECK-NEXT:   .byte	2
485; CHECK-NEXT:   .byte	0
486; CHECK-NEXT:   .short	8
487; CHECK-NEXT:   .short	6
488; CHECK-NEXT:   .short	0
489; CHECK-NEXT:   .long
490; Loc 1: Direct RBP - ofs
491; CHECK-NEXT:   .byte	2
492; CHECK-NEXT:   .byte   0
493; CHECK-NEXT:   .short  8
494; CHECK-NEXT:   .short	6
495; CHECK-NEXT:   .short  0
496; CHECK-NEXT:   .long
497define void @directFrameIdx() {
498entry:
499  %metadata1 = alloca i64, i32 3, align 8
500  store i64 11, ptr %metadata1
501  store i64 12, ptr %metadata1
502  store i64 13, ptr %metadata1
503  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 0, ptr %metadata1)
504  %metadata2 = alloca i8, i32 4, align 8
505  %metadata3 = alloca i16, i32 4, align 8
506  call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 17, i32 5, ptr null, i32 0, ptr %metadata2, ptr %metadata3)
507  ret void
508}
509
510; Test a 64-bit ID.
511;
512; CHECK:        .quad 4294967295
513; CHECK-LABEL:  .long L{{.*}}-_longid
514; CHECK:        .quad 4294967296
515; CHECK-LABEL:  .long L{{.*}}-_longid
516; CHECK:        .quad 9223372036854775807
517; CHECK-LABEL:  .long L{{.*}}-_longid
518; CHECK:        .quad -1
519; CHECK-LABEL:  .long L{{.*}}-_longid
520define void @longid() {
521entry:
522  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967295, i32 0, ptr null, i32 0)
523  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967296, i32 0, ptr null, i32 0)
524  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 9223372036854775807, i32 0, ptr null, i32 0)
525  tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 -1, i32 0, ptr null, i32 0)
526  ret void
527}
528
529; Map a value when R11 is the only free register.
530; The scratch register should not be used for a live stackmap value.
531;
532; CHECK-LABEL:  .long L{{.*}}-_clobberScratch
533; CHECK-NEXT:   .short 0
534; 1 location
535; CHECK-NEXT:   .short 1
536; Loc 0: Indirect fp - offset
537; CHECK-NEXT:   .byte   3
538; CHECK-NEXT:   .byte   0
539; CHECK-NEXT:   .short  4
540; CHECK-NEXT:   .short  6
541; CHECK-NEXT:   .short  0
542; CHECK-NEXT:   .long   -{{[0-9]+}}
543define void @clobberScratch(i32 %a) {
544  tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r12},~{r13},~{r14},~{r15}"() nounwind
545  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 8, i32 %a)
546  ret void
547}
548
549; A stack frame which needs to be realigned at runtime (to meet alignment
550; criteria for values on the stack) does not have a fixed frame size.
551; CHECK-LABEL:  .long L{{.*}}-_needsStackRealignment
552; CHECK-NEXT:   .short 0
553; 0 locations
554; CHECK-NEXT:   .short 0
555define void @needsStackRealignment() {
556  %val = alloca i64, i32 3, align 128
557  tail call void (...) @escape_values(ptr %val)
558; Note: Adding any non-constant to the stackmap would fail because we
559; expected to be able to address off the frame pointer.  In a realigned
560; frame, we must use the stack pointer instead.  This is a separate bug.
561  tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0)
562  ret void
563}
564declare void @escape_values(...)
565
566; CHECK-LABEL:  .long L{{.*}}-_floats
567; CHECK-NEXT:   .short 0
568; Num Locations
569; CHECK-NEXT:   .short 6
570; Loc 0: constant float stored to FP register
571; CHECK-NEXT:   .byte   1
572; CHECK-NEXT:   .byte   0
573; CHECK-NEXT:   .short  16
574; CHECK-NEXT:   .short  {{.*}}
575; CHECK-NEXT:   .short  0
576; CHECK-NEXT:   .long   0
577; Loc 0: constant double stored to FP register
578; CHECK-NEXT:   .byte   1
579; CHECK-NEXT:   .byte   0
580; CHECK-NEXT:   .short  16
581; CHECK-NEXT:   .short  {{.*}}
582; CHECK-NEXT:   .short  0
583; CHECK-NEXT:   .long   0
584; Loc 1: float value in FP register
585; CHECK-NEXT:   .byte   1
586; CHECK-NEXT:   .byte   0
587; CHECK-NEXT:   .short  16
588; CHECK-NEXT:   .short  {{.*}}
589; CHECK-NEXT:   .short  0
590; CHECK-NEXT:   .long   0
591; Loc 2: double value in FP register
592; CHECK-NEXT:   .byte   1
593; CHECK-NEXT:   .byte   0
594; CHECK-NEXT:   .short  16
595; CHECK-NEXT:   .short  {{.*}}
596; CHECK-NEXT:   .short  0
597; CHECK-NEXT:   .long   0
598; Loc 3: float on stack
599; CHECK-NEXT:   .byte   2
600; CHECK-NEXT:   .byte   0
601; CHECK-NEXT:   .short  8
602; CHECK-NEXT:   .short  {{.*}}
603; CHECK-NEXT:   .short  0
604; CHECK-NEXT:   .long   -{{.*}}
605; Loc 4: double on stack
606; CHECK-NEXT:   .byte   2
607; CHECK-NEXT:   .byte   0
608; CHECK-NEXT:   .short  8
609; CHECK-NEXT:   .short  {{.*}}
610; CHECK-NEXT:   .short  0
611; CHECK-NEXT:   .long   -{{.*}}
612define void @floats(float %f, double %g) {
613  %ff = alloca float
614  %gg = alloca double
615  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 888, i32 0, float 1.25,
616    double 1.5, float %f, double %g, ptr %ff, ptr %gg)
617  ret void
618}
619
620declare void @llvm.experimental.stackmap(i64, i32, ...)
621declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)
622declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)
623