1 /* $NetBSD: t___sync_or.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
2
3 /*
4 * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __RCSID("$NetBSD: t___sync_or.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
30
31 #include <atf-c.h>
32 #include <inttypes.h>
33 #include <machine/types.h> // for __HAVE_ATOMIC64_OPS
34
35 /*
36 * These tests don't examine the atomicity.
37 */
38
39 /* XXX
40 * Depending on a combination of arch and compiler, __sync_* is
41 * implemented as compiler's builtin function. In that case, even
42 * if libc exports the function symbol, it is not used. As a result
43 * this tests will examine compiler's builtin functions.
44 * It's better to run only when target is actually in libc.
45 */
46
47 #define DST (0x1122334455667788UL)
48 #define SRC (0xf0f0f0f0f0f0f0f0UL)
49 #define EXPECT (0xf1f2f3f4f5f6f7f8UL)
50
51 #define atf_sync_prefetch(NAME, TYPE, FMT) \
52 ATF_TC(NAME); \
53 ATF_TC_HEAD(NAME, tc) \
54 { \
55 atf_tc_set_md_var(tc, "descr", #NAME); \
56 } \
57 ATF_TC_BODY(NAME, tc) \
58 { \
59 volatile TYPE val; \
60 TYPE src; \
61 TYPE res; \
62 TYPE expval; \
63 TYPE expres; \
64 val = (TYPE)DST; \
65 src = (TYPE)SRC; \
66 expval = (TYPE)EXPECT; \
67 expres = (TYPE)DST; \
68 res = NAME(&val, src); \
69 ATF_REQUIRE_MSG(val == expval, \
70 "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
71 ATF_REQUIRE_MSG(res == expres, \
72 "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
73 }
74
75 atf_sync_prefetch(__sync_fetch_and_or_1, uint8_t, PRIx8);
76 atf_sync_prefetch(__sync_fetch_and_or_2, uint16_t, PRIx16);
77 atf_sync_prefetch(__sync_fetch_and_or_4, uint32_t, PRIx32);
78 #if defined(__HAVE_ATOMIC64_OPS)
79 atf_sync_prefetch(__sync_fetch_and_or_8, uint64_t, PRIx64);
80 #endif
81
82 #define atf_sync_postfetch(NAME, TYPE, FMT) \
83 ATF_TC(NAME); \
84 ATF_TC_HEAD(NAME, tc) \
85 { \
86 atf_tc_set_md_var(tc, "descr", #NAME); \
87 } \
88 ATF_TC_BODY(NAME, tc) \
89 { \
90 volatile TYPE val; \
91 TYPE src; \
92 TYPE res; \
93 TYPE exp; \
94 val = (TYPE)DST; \
95 src = (TYPE)SRC; \
96 exp = (TYPE)EXPECT; \
97 res = NAME(&val, src); \
98 ATF_REQUIRE_MSG(val == exp, \
99 "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
100 ATF_REQUIRE_MSG(res == exp, \
101 "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
102 }
103
104 atf_sync_postfetch(__sync_or_and_fetch_1, uint8_t, PRIx8);
105 atf_sync_postfetch(__sync_or_and_fetch_2, uint16_t, PRIx16);
106 atf_sync_postfetch(__sync_or_and_fetch_4, uint32_t, PRIx32);
107 #ifdef __HAVE_ATOMIC64_OPS
108 atf_sync_postfetch(__sync_or_and_fetch_8, uint64_t, PRIx64);
109 #endif
110
ATF_TP_ADD_TCS(tp)111 ATF_TP_ADD_TCS(tp)
112 {
113 ATF_TP_ADD_TC(tp, __sync_fetch_and_or_1);
114 ATF_TP_ADD_TC(tp, __sync_fetch_and_or_2);
115 ATF_TP_ADD_TC(tp, __sync_fetch_and_or_4);
116 #ifdef __HAVE_ATOMIC64_OPS
117 ATF_TP_ADD_TC(tp, __sync_fetch_and_or_8);
118 #endif
119
120 ATF_TP_ADD_TC(tp, __sync_or_and_fetch_1);
121 ATF_TP_ADD_TC(tp, __sync_or_and_fetch_2);
122 ATF_TP_ADD_TC(tp, __sync_or_and_fetch_4);
123 #ifdef __HAVE_ATOMIC64_OPS
124 ATF_TP_ADD_TC(tp, __sync_or_and_fetch_8);
125 #endif
126
127 return atf_no_error();
128 }
129