1 /* $NetBSD: sunxi_ccu_div.c,v 1.6 2019/11/17 17:33:17 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: sunxi_ccu_div.c,v 1.6 2019/11/17 17:33:17 jmcneill Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34
35 #include <dev/clk/clk_backend.h>
36
37 #include <arm/sunxi/sunxi_ccu.h>
38
39 int
sunxi_ccu_div_enable(struct sunxi_ccu_softc * sc,struct sunxi_ccu_clk * clk,int enable)40 sunxi_ccu_div_enable(struct sunxi_ccu_softc *sc, struct sunxi_ccu_clk *clk,
41 int enable)
42 {
43 struct sunxi_ccu_div *div = &clk->u.div;
44 uint32_t val;
45
46 KASSERT(clk->type == SUNXI_CCU_DIV);
47
48 if (!div->enable)
49 return enable ? 0 : EINVAL;
50
51 val = CCU_READ(sc, div->reg);
52 if (enable)
53 val |= div->enable;
54 else
55 val &= ~div->enable;
56 CCU_WRITE(sc, div->reg, val);
57
58 return 0;
59 }
60
61 u_int
sunxi_ccu_div_get_rate(struct sunxi_ccu_softc * sc,struct sunxi_ccu_clk * clk)62 sunxi_ccu_div_get_rate(struct sunxi_ccu_softc *sc,
63 struct sunxi_ccu_clk *clk)
64 {
65 struct sunxi_ccu_div *div = &clk->u.div;
66 struct clk *clkp, *clkp_parent;
67 u_int rate, ratio;
68 uint32_t val;
69
70 KASSERT(clk->type == SUNXI_CCU_DIV);
71
72 clkp = &clk->base;
73 clkp_parent = clk_get_parent(clkp);
74 if (clkp_parent == NULL)
75 return 0;
76
77 rate = clk_get_rate(clkp_parent);
78 if (rate == 0)
79 return 0;
80
81 val = CCU_READ(sc, div->reg);
82 if (div->div)
83 ratio = __SHIFTOUT(val, div->div);
84 else
85 ratio = 0;
86
87 if ((div->flags & SUNXI_CCU_DIV_ZERO_IS_ONE) != 0 && ratio == 0)
88 ratio = 1;
89 if (div->flags & SUNXI_CCU_DIV_POWER_OF_TWO)
90 ratio = 1 << ratio;
91 else if (div->flags & SUNXI_CCU_DIV_TIMES_TWO) {
92 ratio = ratio << 1;
93 if (ratio == 0)
94 ratio = 1;
95 } else
96 ratio++;
97
98 return rate / ratio;
99 }
100
101 static int
sunxi_ccu_div_select_parent(struct sunxi_ccu_softc * sc,struct sunxi_ccu_clk * clk,u_int new_rate)102 sunxi_ccu_div_select_parent(struct sunxi_ccu_softc *sc,
103 struct sunxi_ccu_clk *clk, u_int new_rate)
104 {
105 struct sunxi_ccu_div *div = &clk->u.div;
106 struct sunxi_ccu_clk *clk_parent;
107 struct clk *best_parent;
108 u_int index, best_diff;
109 const char *pname;
110
111 best_parent = NULL;
112 best_diff = ~0u;
113 for (index = 0; index < div->nparents; index++) {
114 pname = div->parents[index];
115 if (pname == NULL)
116 continue;
117 clk_parent = sunxi_ccu_clock_find(sc, pname);
118 if (clk_parent == NULL)
119 continue;
120 const u_int rate = clk_get_rate(&clk_parent->base);
121 const u_int diff = abs((int)rate - (int)new_rate);
122 if (diff < best_diff) {
123 best_diff = diff;
124 best_parent = &clk_parent->base;
125 }
126 }
127 if (best_diff == ~0u)
128 return EINVAL;
129
130 return clk_set_parent(&clk->base, best_parent);
131 }
132
133 int
sunxi_ccu_div_set_rate(struct sunxi_ccu_softc * sc,struct sunxi_ccu_clk * clk,u_int new_rate)134 sunxi_ccu_div_set_rate(struct sunxi_ccu_softc *sc,
135 struct sunxi_ccu_clk *clk, u_int new_rate)
136 {
137 struct sunxi_ccu_div *div = &clk->u.div;
138 struct clk *clkp, *clkp_parent;
139 int parent_rate;
140 uint32_t val, raw_div;
141 int ratio;
142
143 KASSERT(clk->type == SUNXI_CCU_DIV);
144
145 clkp = &clk->base;
146 clkp_parent = clk_get_parent(clkp);
147 if (clkp_parent == NULL)
148 return ENXIO;
149
150 if (div->div == 0) {
151 if ((div->flags & SUNXI_CCU_DIV_SET_RATE_PARENT) != 0)
152 return clk_set_rate(clkp_parent, new_rate);
153 else
154 return sunxi_ccu_div_select_parent(sc, clk, new_rate);
155 }
156
157 val = CCU_READ(sc, div->reg);
158
159 parent_rate = clk_get_rate(clkp_parent);
160 if (parent_rate == 0)
161 return (new_rate == 0) ? 0 : ERANGE;
162
163 ratio = howmany(parent_rate, new_rate);
164 if ((div->flags & SUNXI_CCU_DIV_TIMES_TWO) != 0) {
165 if (ratio > 1 && (ratio & 1) != 0)
166 ratio++;
167 raw_div = ratio >> 1;
168 } else if ((div->flags & SUNXI_CCU_DIV_POWER_OF_TWO) != 0) {
169 return EINVAL;
170 } else {
171 raw_div = (ratio > 0 ) ? ratio - 1 : 0;
172 }
173 if (raw_div > __SHIFTOUT_MASK(div->div))
174 return ERANGE;
175
176 val &= ~div->div;
177 val |= __SHIFTIN(raw_div, div->div);
178 CCU_WRITE(sc, div->reg, val);
179
180 return 0;
181 }
182
183 int
sunxi_ccu_div_set_parent(struct sunxi_ccu_softc * sc,struct sunxi_ccu_clk * clk,const char * name)184 sunxi_ccu_div_set_parent(struct sunxi_ccu_softc *sc,
185 struct sunxi_ccu_clk *clk, const char *name)
186 {
187 struct sunxi_ccu_div *div = &clk->u.div;
188 uint32_t val;
189 u_int index;
190
191 KASSERT(clk->type == SUNXI_CCU_DIV);
192
193 if (div->sel == 0)
194 return ENODEV;
195
196 for (index = 0; index < div->nparents; index++) {
197 if (div->parents[index] != NULL &&
198 strcmp(div->parents[index], name) == 0)
199 break;
200 }
201 if (index == div->nparents)
202 return EINVAL;
203
204 val = CCU_READ(sc, div->reg);
205 val &= ~div->sel;
206 val |= __SHIFTIN(index, div->sel);
207 CCU_WRITE(sc, div->reg, val);
208
209 return 0;
210 }
211
212 const char *
sunxi_ccu_div_get_parent(struct sunxi_ccu_softc * sc,struct sunxi_ccu_clk * clk)213 sunxi_ccu_div_get_parent(struct sunxi_ccu_softc *sc,
214 struct sunxi_ccu_clk *clk)
215 {
216 struct sunxi_ccu_div *div = &clk->u.div;
217 u_int index;
218 uint32_t val;
219
220 KASSERT(clk->type == SUNXI_CCU_DIV);
221
222 if (div->sel == 0)
223 return div->parents[0];
224
225 val = CCU_READ(sc, div->reg);
226 index = __SHIFTOUT(val, div->sel);
227
228 return div->parents[index];
229 }
230