xref: /netbsd-src/sys/arch/sparc/dev/sxvar.h (revision a570f7127d075c9ec034d6df7402d27c9d42cb56)
1 /*	$NetBSD: sxvar.h,v 1.5 2023/06/13 10:09:31 macallan Exp $	*/
2 
3 /*-
4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Michael Lorenz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef SXVAR_H
33 #define SXVAR_H
34 
35 #include <sparc/dev/sxreg.h>
36 
37 struct sx_softc {
38 	device_t		sc_dev;
39 	bus_addr_t		sc_uregs;
40 	bus_space_tag_t		sc_tag;
41 	bus_space_handle_t	sc_regh;
42 	int			sc_cnt;
43 };
44 
45 static inline void
sx_write(struct sx_softc * sc,int addr,uint32_t val)46 sx_write(struct sx_softc *sc, int addr, uint32_t val)
47 {
48 	bus_space_write_4(sc->sc_tag, sc->sc_regh, addr, val);
49 }
50 
51 static inline uint32_t
sx_read(struct sx_softc * sc,int addr)52 sx_read(struct sx_softc *sc, int addr)
53 {
54 	return bus_space_read_4(sc->sc_tag, sc->sc_regh, addr);
55 }
56 
57 /*
58  * to be used before issuing SX instructions
59  * this will periodically allow the instruction queue to drain in order
60  * to avoid excessive MBus relinquish & retry cycles during long SX ops
61  * which may cause us to lose interrupts
62  */
63 static inline void
sx_wait(struct sx_softc * sc)64 sx_wait(struct sx_softc *sc)
65 {
66 	uint32_t reg;
67 	if (sc->sc_cnt > 6) {
68 		do {
69 			reg = bus_space_read_4(sc->sc_tag, sc->sc_regh,
70 						 SX_CONTROL_STATUS);
71 		} while ((reg & SX_MT) == 0);
72 		sc->sc_cnt = 0;
73 	} else
74 		sc->sc_cnt++;
75 }
76 
77 void sx_dump(void);
78 
79 #endif
80