xref: /netbsd-src/sys/arch/sh3/include/adcreg.h (revision 95e1ffb15694e54f29f8baaa4232152b703c2a5a)
1 /*	$NetBSD: adcreg.h,v 1.3 2005/12/11 12:18:58 christos Exp $ */
2 
3 /*
4  * Copyright (c) 2003 Valeriy E. Ushakov
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef _SH3_ADCREG_H_
31 #define _SH3_ADCREG_H_
32 
33 #define SH7709_ADDRAH	0xa4000080
34 #define SH7709_ADDRAL	0xa4000082
35 #define SH7709_ADDRBH	0xa4000084
36 #define SH7709_ADDRBL	0xa4000086
37 #define SH7709_ADDRCH	0xa4000088
38 #define SH7709_ADDRCL	0xa400008a
39 #define SH7709_ADDRDH	0xa400008c
40 #define SH7709_ADDRDL	0xa400008e
41 
42 
43 #define SH7709_ADCSR	0xa4000090
44 
45 #define SH7709_ADCSR_ADF	0x80 /* end flag */
46 #define SH7709_ADCSR_ADIE	0x40 /* interrupt enable */
47 #define SH7709_ADCSR_ADST	0x20 /* start conversion */
48 #define SH7709_ADCSR_MULTI	0x10 /* multi mode */
49 #define SH7709_ADCSR_CKS	0x08 /* clock select */
50 #define SH7709_ADCSR_CH_MASK	0x07 /* channel select mask */
51 
52 #define SH7709_ADCSR_BITS						\
53 	"\177\020" "b\07F\0" "b\06IE\0" "b\05ST\0" "b\04MULTI\0"	\
54 	"f\03\01CKS\0" "f\0\03CH\0"
55 
56 
57 #define SH7709_ADCR	0xa4000092
58 
59 #define SH7709_ADCR_TRGE_MASK	0xc0 /* external trigger enabled when 11 */
60 #define SH7709_ADCR_SCN		0x20 /* scan mode (if SH7709_ADCSR_MULTI) */
61 
62 #define SH7709_ADCR_BITS	\
63 	"\177\020" "F\06\02\0" ":\03TRGE\0" "b\05SCAN\0"
64 
65 #endif /* _SH3_ADCREG_H_ */
66