1 /* $NetBSD: sdhcvar.h,v 1.35 2024/05/09 01:33:13 dyoung Exp $ */ 2 /* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _SDHCVAR_H_ 21 #define _SDHCVAR_H_ 22 23 #include <sys/bus.h> 24 #include <sys/device.h> 25 #include <sys/pmf.h> 26 27 struct sdhc_host; 28 struct sdmmc_command; 29 30 struct sdhc_softc { 31 device_t sc_dev; 32 33 struct sdhc_host **sc_host; 34 int sc_nhosts; 35 36 bus_dma_tag_t sc_dmat; 37 38 uint32_t sc_flags; 39 #define SDHC_FLAG_USE_DMA 0x00000001 40 #define SDHC_FLAG_FORCE_DMA 0x00000002 41 #define SDHC_FLAG_NO_PWR0 0x00000004 /* Freescale ESDHC */ 42 #define SDHC_FLAG_HAVE_DVS 0x00000008 /* Freescale ESDHC */ 43 #define SDHC_FLAG_32BIT_ACCESS 0x00000010 /* Freescale ESDHC */ 44 #define SDHC_FLAG_ENHANCED 0x00000020 /* Freescale ESDHC */ 45 #define SDHC_FLAG_8BIT_MODE 0x00000040 /* MMC 8bit mode is supported */ 46 #define SDHC_FLAG_HAVE_CGM 0x00000080 /* Netlogic XLP */ 47 #define SDHC_FLAG_NO_LED_ON 0x00000100 /* LED_ON unsupported in HOST_CTL */ 48 #define SDHC_FLAG_HOSTCAPS 0x00000200 /* No device provided capabilities */ 49 #define SDHC_FLAG_RSP136_CRC 0x00000400 /* Resp 136 with CRC and end-bit */ 50 #define SDHC_FLAG_SINGLE_ONLY 0x00000800 /* Single transfer only */ 51 #define SDHC_FLAG_WAIT_RESET 0x00001000 /* Wait for soft resets to start */ 52 #define SDHC_FLAG_NO_HS_BIT 0x00002000 /* Don't set SDHC_HIGH_SPEED bit */ 53 #define SDHC_FLAG_EXTERNAL_DMA 0x00004000 54 #define SDHC_FLAG_EXTDMA_DMAEN 0x00008000 /* ext. dma need SDHC_DMA_ENABLE */ 55 #define SDHC_FLAG_NON_REMOVABLE \ 56 0x00010000 /* slot has no card detect, behave 57 * as if a card is always present 58 */ 59 #define SDHC_FLAG_NO_CLKBASE 0x00020000 /* ignore clkbase register */ 60 #define SDHC_FLAG_SINGLE_POWER_WRITE 0x00040000 61 #define SDHC_FLAG_NO_TIMEOUT 0x00080000 /* ignore timeout interrupts */ 62 #define SDHC_FLAG_POLL_CARD_DET 0x00100000 /* polling card detect */ 63 #define SDHC_FLAG_SLOW_SDR50 0x00200000 /* reduce SDR50 speed */ 64 #define SDHC_FLAG_USDHC 0x00400000 /* Freescale uSDHC */ 65 #define SDHC_FLAG_NO_AUTO_STOP 0x00800000 /* No auto CMD12 */ 66 #define SDHC_FLAG_NO_BUSY_INTR 0x01000000 /* No intr when RESP_BUSY */ 67 #define SDHC_FLAG_STOP_WITH_TC 0x02000000 /* CMD12 can set xfer complete w/o SCF_RSP_BSY */ 68 #define SDHC_FLAG_BROKEN_ADMA2_ZEROLEN 0x04000000 /* 69 * Broken ADMA2 zero length descriptor 70 * Can't 64K Byte data transfer 71 */ 72 #define SDHC_FLAG_NO_1_8_V 0x08000000 /* No 1.8V supply */ 73 #define SDHC_FLAG_BROKEN_ADMA 0x10000000 /* ADMA engine does not work */ 74 75 uint32_t sc_clkbase; 76 int sc_clkmsk; /* Mask for SDCLK */ 77 uint32_t sc_caps;/* attachment provided capabilities */ 78 uint32_t sc_caps2; 79 80 int (*sc_vendor_rod)(struct sdhc_softc *, int); 81 int (*sc_vendor_write_protect)(struct sdhc_softc *); 82 int (*sc_vendor_card_detect)(struct sdhc_softc *); 83 int (*sc_vendor_bus_width)(struct sdhc_softc *, int); 84 int (*sc_vendor_bus_clock)(struct sdhc_softc *, int); 85 int (*sc_vendor_bus_clock_post)(struct sdhc_softc *, int); 86 int (*sc_vendor_transfer_data_dma)(struct sdhc_softc *, struct sdmmc_command *); 87 void (*sc_vendor_hw_reset)(struct sdhc_softc *, struct sdhc_host *); 88 int (*sc_vendor_signal_voltage)(struct sdhc_softc *, int); 89 90 u_int sc_write_delay; /* delay (us) after io write */ 91 }; 92 93 /* Host controller functions called by the attachment driver. */ 94 int sdhc_host_found(struct sdhc_softc *, bus_space_tag_t, 95 bus_space_handle_t, bus_size_t); 96 int sdhc_intr(void *); 97 int sdhc_detach(struct sdhc_softc *, int); 98 bool sdhc_suspend(device_t, const pmf_qual_t *); 99 bool sdhc_resume(device_t, const pmf_qual_t *); 100 bool sdhc_shutdown(device_t, int); 101 kmutex_t *sdhc_host_lock(struct sdhc_host *); 102 uint8_t sdhc_host_read_1(struct sdhc_host *, int); 103 uint16_t sdhc_host_read_2(struct sdhc_host *, int); 104 uint32_t sdhc_host_read_4(struct sdhc_host *, int); 105 void sdhc_host_write_1(struct sdhc_host *, int, uint8_t); 106 void sdhc_host_write_2(struct sdhc_host *, int, uint16_t); 107 void sdhc_host_write_4(struct sdhc_host *, int, uint32_t); 108 109 #endif /* _SDHCVAR_H_ */ 110