xref: /netbsd-src/sys/dev/ofisa/sb_ofisa.c (revision 4c0c4f7468037781099dd2a413c980f03d3d466e)
1 /*	$NetBSD: sb_ofisa.c,v 1.24 2023/04/18 06:37:25 riastradh Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: sb_ofisa.c,v 1.24 2023/04/18 06:37:25 riastradh Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 
40 #include <sys/bus.h>
41 #include <sys/intr.h>
42 
43 #include <sys/audioio.h>
44 #include <dev/audio/audio_if.h>
45 #include <dev/midi_if.h>
46 
47 #include <dev/ofw/openfirm.h>
48 #include <dev/isa/isavar.h>
49 #include <dev/ofisa/ofisavar.h>
50 
51 #include <dev/isa/sbreg.h>
52 #include <dev/isa/sbvar.h>
53 #include <dev/isa/sbdspvar.h>
54 
55 int	sb_ofisa_match(device_t, cfdata_t, void *);
56 void	sb_ofisa_attach(device_t, device_t, void *);
57 
58 CFATTACH_DECL_NEW(sb_ofisa, sizeof(struct sbdsp_softc),
59     sb_ofisa_match, sb_ofisa_attach, NULL, NULL);
60 
61 static const struct device_compatible_entry compat_data[] = {
62 	{ .compat = "pnpPNP,b000" },	/* generic SB 1.5 */
63 	{ .compat = "pnpPNP,b001" },	/* generic SB 2.0 */
64 	{ .compat = "pnpPNP,b002" },	/* generic SB Pro */
65 	{ .compat = "pnpPNP,b003" },	/* generic SB 16 */
66 	DEVICE_COMPAT_EOL
67 };
68 
69 int
sb_ofisa_match(device_t parent,cfdata_t cf,void * aux)70 sb_ofisa_match(device_t parent, cfdata_t cf, void *aux)
71 {
72 	struct ofisa_attach_args *aa = aux;
73 
74 	/*
75 	 * Use a low match priority so that a more specific driver
76 	 * can match, e.g. a native ESS driver.
77 	 */
78 	return of_compatible_match(aa->oba.oba_phandle, compat_data) ? 1 : 0;
79 }
80 
81 void
sb_ofisa_attach(device_t parent,device_t self,void * aux)82 sb_ofisa_attach(device_t parent, device_t self, void *aux)
83 {
84 	struct sbdsp_softc *sc = device_private(self);
85 	struct ofisa_attach_args *aa = aux;
86 	struct ofisa_reg_desc reg;
87 	struct ofisa_intr_desc intr;
88 	struct ofisa_dma_desc dma[2];
89 	int ndrq;
90 
91 	sc->sc_dev = self;
92 
93 	/*
94 	 * We're living on an OFW.  We have to ask the OFW what our
95 	 * registers and interrupts properties look like.
96 	 *
97 	 * We expect:
98 	 *
99 	 *	1 i/o register region
100 	 *	1 interrupt
101 	 *	1 or 2 DMA channels
102 	 */
103 
104 	n = ofisa_reg_get(aa->oba.oba_phandle, &reg, 1);
105 	if (n != 1) {
106 		aprint_error(": error getting register data\n");
107 		return;
108 	}
109 	if (reg.type != OFISA_REG_TYPE_IO) {
110 		aprint_error(": register type not i/o\n");
111 		return;
112 	}
113 	if (reg.len != SB_NPORT && reg.len != SBP_NPORT) {
114 		aprint_error(": weird register size (%lu, expected %d or %d)\n",
115 		    (unsigned long)reg.len, SB_NPORT, SBP_NPORT);
116 		return;
117 	}
118 
119 	n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1);
120 	if (n != 1) {
121 		aprint_error(": error getting interrupt data\n");
122 		return;
123 	}
124 
125 	ndrq = ofisa_dma_get(aa->oba.oba_phandle, dma, 2);
126 	if (ndrq != 1 && ndrq != 2) {
127 		aprint_error(": error getting DMA data\n");
128 		return;
129 	}
130 
131 	sc->sc_ic = aa->ic;
132 
133 	sc->sc_iot = aa->iot;
134 	if (bus_space_map(sc->sc_iot, reg.addr, reg.len, 0, &sc->sc_ioh)) {
135 		aprint_error(": unable to map register space\n");
136 		return;
137 	}
138 
139 	/* XXX These are only for setting chip configuration registers. */
140 	sc->sc_iobase = reg.addr;
141 	sc->sc_irq = intr.irq;
142 
143 	sc->sc_drq8 = DRQUNK;
144 	sc->sc_drq16 = DRQUNK;
145 
146 	for (n = 0; n < ndrq; n++) {
147 		/* XXX check mode? */
148 		switch (dma[n].width) {
149 		case 8:
150 			if (sc->sc_drq8 == DRQUNK)
151 				sc->sc_drq8 = dma[n].drq;
152 			break;
153 		case 16:
154 			if (sc->sc_drq16 == DRQUNK)
155 				sc->sc_drq16 = dma[n].drq;
156 			break;
157 		default:
158 			aprint_error(": weird DMA width %d\n", dma[n].width);
159 			return;
160 		}
161 	}
162 
163 	if (sc->sc_drq8 == DRQUNK) {
164 		aprint_error(": no 8-bit DMA channel\n");
165 		return;
166 	}
167 
168 	if (sbmatch(sc) == 0) {
169 		aprint_error(": sbmatch failed\n");
170 		return;
171 	}
172 
173 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
174 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
175 
176 	sc->sc_ih = isa_intr_establish(aa->ic, intr.irq, IST_EDGE, IPL_AUDIO,
177 	    sbdsp_intr, sc);
178 
179 	ofisa_print_model(self, aa->oba.oba_phandle);
180 
181 	sbattach(sc);
182 }
183