xref: /netbsd-src/sys/arch/luna68k/stand/boot/romvec.h (revision df6945b89fd70f3aba06e2ec3fc619713a01c91c)
1 /*	$NetBSD: romvec.h,v 1.1 2013/01/05 17:44:24 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1992 OMRON Corporation.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * OMRON Corporation.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by the University of
20  *	California, Berkeley and its contributors.
21  * 4. Neither the name of the University nor the names of its contributors
22  *    may be used to endorse or promote products derived from this software
23  *    without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  *	@(#)romvec.h	8.1 (Berkeley) 6/10/93
38  */
39 /*
40  * Copyright (c) 1992 OMRON Corporation.
41  * Copyright (c) 1992, 1993
42  *	The Regents of the University of California.  All rights reserved.
43  *
44  * This code is derived from software contributed to Berkeley by
45  * OMRON Corporation.
46  *
47  * Redistribution and use in source and binary forms, with or without
48  * modification, are permitted provided that the following conditions
49  * are met:
50  * 1. Redistributions of source code must retain the above copyright
51  *    notice, this list of conditions and the following disclaimer.
52  * 2. Redistributions in binary form must reproduce the above copyright
53  *    notice, this list of conditions and the following disclaimer in the
54  *    documentation and/or other materials provided with the distribution.
55  * 3. Neither the name of the University nor the names of its contributors
56  *    may be used to endorse or promote products derived from this software
57  *    without specific prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  *	@(#)romvec.h	8.1 (Berkeley) 6/10/93
72  */
73 
74 /* romvec.h Oct-22-1991 */
75 
76 
77 #define RVPtr	((struct romvec *) 0x41000000)
78 
79 #define ROM_memsize	(*((int *) *RVPtr->vec03))
80 #define	ROM_getchar	(*RVPtr->vec06)
81 #define	ROM_putchar	(*RVPtr->vec07)
82 #define	ROM_abort	(*RVPtr->vec25)
83 #define ROM_plane	(*((int *) *RVPtr->vec46))
84 
85 struct romvec {
86     int     (*vec00)(void); /* 00 [00] - Cold Boot Entry */
87     int     (*vec01)(void); /* 01 [04] */
88     int     (*vec02)(void); /* 02 [08] */
89     int     (*vec03)(void); /* 03 [0C] - memsize : Memory Size */
90     int     (*vec04)(void); /* 04 [10] */
91     int     (*vec05)(void); /* 05 [14] */
92     int     (*vec06)(void); /* 06 [18] - getchar : get 1 charactor from console	*/
93     int     (*vec07)(int);  /* 07 [1C] - putchar : put 1 charactor to console		*/
94     int     (*vec08)(void); /* 08 [20] */
95     int     (*vec09)(void); /* 09 [24] */
96     int     (*vec10)(void); /* 10 [28] */
97     int     (*vec11)(void); /* 11 [2C] */
98     int     (*vec12)(void); /* 12 [30] */
99     int     (*vec13)(void); /* 13 [34] */
100     int     (*vec14)(void); /* 14 [38] */
101     int     (*vec15)(void); /* 15 [3C] */
102     int     (*vec16)(void); /* 16 [40] */
103     int     (*vec17)(void); /* 17 [44] */
104     int     (*vec18)(void); /* 18 [48] */
105     int     (*vec19)(void); /* 19 [4C] */
106     int     (*vec20)(void); /* 20 [50] */
107     int     (*vec21)(void); /* 21 [54] */
108     int     (*vec22)(void); /* 22 [58] */
109     int     (*vec23)(void); /* 23 [5C] */
110     int     (*vec24)(void); /* 24 [60] */
111     int     (*vec25)(void); /* 25 [64] - abort : back to ROM Monitor */
112     int     (*vec26)(void); /* 26 [68] */
113     int     (*vec27)(void); /* 27 [6C] */
114     int     (*vec28)(void); /* 28 [70] */
115     int     (*vec29)(void); /* 29 [74] */
116     int     (*vec30)(void); /* 30 [78] */
117     int     (*vec31)(void); /* 31 [7C] */
118     int     (*vec32)(void); /* 32 [80] */
119     int     (*vec33)(void); /* 33 [84] */
120     int     (*vec34)(void); /* 34 [88] */
121     int     (*vec35)(void); /* 35 [8C] */
122     int     (*vec36)(void); /* 36 [90] */
123     int     (*vec37)(void); /* 37 [94] */
124     int     (*vec38)(void); /* 38 [98] */
125     int     (*vec39)(void); /* 39 [9C] */
126     int     (*vec40)(void); /* 40 [A0] */
127     int     (*vec41)(void); /* 41 [A4] */
128     int     (*vec42)(void); /* 42 [A8] */
129     int     (*vec43)(void); /* 43 [AC] */
130     int     (*vec44)(void); /* 44 [B0] */
131     int     (*vec45)(void); /* 45 [B4] */
132     int     (*vec46)(void); /* 46 [B8] -- number of plane */
133     int     (*vec47)(void); /* 47 [BC] */
134     int     (*vec48)(void); /* 48 [C0] */
135     int     (*vec49)(void); /* 49 [C4] */
136     int     (*vec50)(void); /* 50 [C8] */
137     int     (*vec51)(void); /* 51 [CC] */
138     int     (*vec52)(void); /* 52 [D0] */
139     int     (*vec53)(void); /* 53 [D4] */
140     int     (*vec54)(void); /* 54 [D8] */
141     int     (*vec55)(void); /* 55 [DC] */
142     int     (*vec56)(void); /* 56 [E0] */
143     int     (*vec57)(void); /* 57 [E4] */
144     int     (*vec58)(void); /* 58 [E8] */
145     int     (*vec59)(void); /* 59 [EC] */
146     int     (*vec60)(void); /* 60 [F0] */
147     int     (*vec61)(void); /* 61 [F4] */
148     int     (*vec62)(void); /* 62 [F8] */
149     int     (*vec63)(void); /* 63 [FC] */
150 };
151 
152 
153