1 /* $NetBSD: rmixl_obio.c,v 1.10 2022/09/29 07:00:47 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * On-board device autoconfiguration support for RMI {XLP, XLR, XLS} chips
40 */
41
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: rmixl_obio.c,v 1.10 2022/09/29 07:00:47 skrll Exp $");
44
45 #include "locators.h"
46 #include "pci.h"
47 #define _MIPS_BUS_DMA_PRIVATE
48
49 #include <sys/param.h>
50 #include <sys/bus.h>
51 #include <sys/device.h>
52 #include <sys/extent.h>
53 #include <sys/systm.h>
54
55 #include <mips/int_fmtio.h>
56
57 #include <mips/rmi/rmixlreg.h>
58 #include <mips/rmi/rmixlvar.h>
59 #include <mips/rmi/rmixl_intr.h>
60 #include <mips/rmi/rmixl_obiovar.h>
61 #include <mips/rmi/rmixl_pcievar.h>
62
63 #include <evbmips/rmixl/autoconf.h>
64
65 #ifdef OBIO_DEBUG
66 int obio_rmixl_debug = OBIO_DEBUG;
67 # define DPRINTF(x) do { if (obio_rmixl_debug) printf x ; } while (0)
68 #else
69 # define DPRINTF(x)
70 #endif
71
72 static int obio_match(device_t, cfdata_t, void *);
73 static void obio_attach(device_t, device_t, void *);
74 static int obio_print(void *, const char *);
75 static int obio_search(device_t, cfdata_t, const int *, void *);
76 static void obio_bus_init(struct obio_softc *);
77 static void obio_dma_init_64(bus_dma_tag_t);
78 static int rmixl_addr_error_intr(void *);
79
80
81 CFATTACH_DECL_NEW(obio_rmixl, sizeof(struct obio_softc),
82 obio_match, obio_attach, NULL, NULL);
83
84 int obio_found;
85
86 static int
obio_match(device_t parent,cfdata_t cf,void * aux)87 obio_match(device_t parent, cfdata_t cf, void *aux)
88 {
89 struct mainbus_attach_args *aa = aux;
90
91 if (obio_found == 0)
92 if (strncmp(aa->ma_name, cf->cf_name, strlen(cf->cf_name)) == 0)
93 return 1;
94
95 return 0;
96 }
97
98 static void
obio_attach(device_t parent,device_t self,void * aux)99 obio_attach(device_t parent, device_t self, void *aux)
100 {
101 struct obio_softc *sc = device_private(self);
102 bus_addr_t ba;
103
104 obio_found = 1;
105 sc->sc_dev = self;
106
107 ba = (bus_addr_t)rmixl_configuration.rc_io_pbase;
108 KASSERT(ba != 0);
109
110 obio_bus_init(sc);
111
112 aprint_normal(" addr %#"PRIxBUSADDR" size %#"PRIxBUSSIZE"\n",
113 ba, (bus_size_t)RMIXL_IO_DEV_SIZE);
114 aprint_naive("\n");
115
116 /*
117 * Attach on-board devices as specified in the kernel config file.
118 */
119 config_search(self, NULL,
120 CFARGS(.search = obio_search));
121 }
122
123 static int
obio_print(void * aux,const char * pnp)124 obio_print(void *aux, const char *pnp)
125 {
126 struct obio_attach_args *obio = aux;
127
128 if (obio->obio_addr != OBIOCF_ADDR_DEFAULT) {
129 aprint_normal(" addr %#"PRIxBUSADDR, obio->obio_addr);
130 if (obio->obio_size != OBIOCF_SIZE_DEFAULT)
131 aprint_normal("-%#"PRIxBUSADDR,
132 obio->obio_addr + (obio->obio_size - 1));
133 }
134 if (obio->obio_mult != OBIOCF_MULT_DEFAULT)
135 aprint_normal(" mult %d", obio->obio_mult);
136 if (obio->obio_intr != OBIOCF_INTR_DEFAULT)
137 aprint_normal(" intr %d", obio->obio_intr);
138 if (obio->obio_tmsk != OBIOCF_TMSK_DEFAULT)
139 aprint_normal(" tmsk %d", obio->obio_tmsk);
140
141 return (UNCONF);
142 }
143
144 static int
obio_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)145 obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
146 {
147 struct obio_softc *sc = device_private(parent);
148 struct obio_attach_args obio;
149
150 obio.obio_eb_bst = sc->sc_eb_bst;
151 obio.obio_el_bst = sc->sc_el_bst;
152 obio.obio_addr = cf->cf_loc[OBIOCF_ADDR];
153 obio.obio_size = cf->cf_loc[OBIOCF_SIZE];
154 obio.obio_mult = cf->cf_loc[OBIOCF_MULT];
155 obio.obio_intr = cf->cf_loc[OBIOCF_INTR];
156 obio.obio_tmsk = cf->cf_loc[OBIOCF_TMSK];
157 obio.obio_29bit_dmat = sc->sc_29bit_dmat;
158 obio.obio_32bit_dmat = sc->sc_32bit_dmat;
159 obio.obio_64bit_dmat = sc->sc_64bit_dmat;
160
161 if (config_probe(parent, cf, &obio))
162 config_attach(parent, cf, &obio, obio_print, CFARGS_NONE);
163
164 return 0;
165 }
166
167 static void
obio_bus_init(struct obio_softc * sc)168 obio_bus_init(struct obio_softc *sc)
169 {
170 struct rmixl_config *rcp = &rmixl_configuration;
171 static int done = 0;
172 int error;
173
174 if (done)
175 return;
176 done = 1;
177
178 /* obio (devio) space, Big Endian */
179 if (rcp->rc_obio_eb_memt.bs_cookie == 0)
180 rmixl_obio_eb_bus_mem_init(&rcp->rc_obio_eb_memt, rcp);
181
182 /* obio (devio) space, Little Endian */
183 if (rcp->rc_obio_el_memt.bs_cookie == 0)
184 rmixl_obio_el_bus_mem_init(&rcp->rc_obio_el_memt, rcp);
185
186 /* dma space for all memory, including >= 4GB */
187 if (rcp->rc_dma_tag._cookie == 0)
188 obio_dma_init_64(&rcp->rc_dma_tag);
189 rcp->rc_64bit_dmat = &rcp->rc_dma_tag;
190
191 /* dma space for addr < 4GB */
192 if (rcp->rc_32bit_dmat == NULL) {
193 error = bus_dmatag_subregion(rcp->rc_64bit_dmat,
194 0, __MASK(32), &rcp->rc_32bit_dmat, 0);
195 if (error)
196 panic("%s: failed to create 32bit dma tag: %d",
197 __func__, error);
198 }
199
200 /* dma space for addr < 512MB */
201 if (rcp->rc_29bit_dmat == NULL) {
202 error = bus_dmatag_subregion(rcp->rc_32bit_dmat,
203 0, __MASK(29), &rcp->rc_29bit_dmat, 0);
204 if (error)
205 panic("%s: failed to create 29bit dma tag: %d",
206 __func__, error);
207 }
208
209 sc->sc_base = (bus_addr_t)rcp->rc_io_pbase;
210 sc->sc_size = (bus_size_t)RMIXL_IO_DEV_SIZE;
211 sc->sc_eb_bst = (bus_space_tag_t)&rcp->rc_obio_eb_memt;
212 sc->sc_el_bst = (bus_space_tag_t)&rcp->rc_obio_el_memt;
213 sc->sc_29bit_dmat = rcp->rc_29bit_dmat;
214 sc->sc_32bit_dmat = rcp->rc_32bit_dmat;
215 sc->sc_64bit_dmat = rcp->rc_64bit_dmat;
216 }
217
218 static void
obio_dma_init_64(bus_dma_tag_t t)219 obio_dma_init_64(bus_dma_tag_t t)
220 {
221 t->_cookie = t;
222 t->_wbase = 0;
223 t->_bounce_alloc_lo = 0;
224 t->_bounce_alloc_hi = 0;
225 t->_dmamap_ops = mips_bus_dmamap_ops;
226 t->_dmamem_ops = mips_bus_dmamem_ops;
227 t->_dmatag_ops = mips_bus_dmatag_ops;
228 }
229
230 void
rmixl_addr_error_init(void)231 rmixl_addr_error_init(void)
232 {
233 uint32_t r;
234
235 /*
236 * activate error addr detection on all (configurable) devices
237 * preserve reserved bit fields
238 * note some of these bits are read-only (writes are ignored)
239 */
240 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_DEVICE_MASK);
241 r |= ~(__BITS(19,16) | __BITS(10,9) | __BITS(7,5));
242 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_DEVICE_MASK, r);
243
244 /*
245 * enable the address error interrupts
246 * "upgrade" cache and CPU errors to A1
247 */
248 #define _ADDR_ERR_DEVSTAT_A1 (__BIT(8) | __BIT(1) | __BIT(0))
249 #define _ADDR_ERR_RESV \
250 (__BITS(31,21) | __BITS(15,14) | __BITS(10,9) | __BITS(7,2))
251 #define _BITERR_INT_EN_RESV (__BITS(31,8) | __BIT(4))
252
253 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_EN);
254 r &= _ADDR_ERR_RESV;
255 r |= ~_ADDR_ERR_RESV;
256 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR0_EN, r);
257
258 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_UPG);
259 r &= _ADDR_ERR_RESV;
260 r |= _ADDR_ERR_DEVSTAT_A1;
261 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR0_UPG, r);
262
263 /*
264 * clear the log regs and the dev stat (interrupt status) regs
265 * "Write any value to bit[0] to clear"
266 */
267 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_CLEAR);
268 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR1_CLEAR, r);
269
270 /*
271 * enable the double bit error interrupts
272 * (assume reserved bits, which are read-only, are ignored)
273 */
274 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_BITERR_INT_EN);
275 r &= _BITERR_INT_EN_RESV;
276 r |= __BITS(7,5);
277 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_BITERR_INT_EN, r);
278
279 /*
280 * establish address error ISR
281 * XXX assuming "int 16 (bridge_tb)" is our irq
282 * XXX is true for XLS family only
283 */
284 if (cpu_rmixls(mips_options.mips_cpu))
285 rmixl_intr_establish(16, 1, IPL_HIGH,
286 RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
287 rmixl_addr_error_intr, NULL, false);
288 }
289
290 int
rmixl_addr_error_check(void)291 rmixl_addr_error_check(void)
292 {
293 uint32_t aerr0_devstat;
294 uint32_t aerr0_log1;
295 uint32_t aerr0_log2;
296 uint32_t aerr0_log3;
297 uint32_t aerr1_devstat;
298 uint32_t aerr1_log1;
299 uint32_t aerr1_log2;
300 uint32_t aerr1_log3;
301 uint32_t sbe_counts;
302 uint32_t dbe_counts;
303
304 aerr0_devstat = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_DEVSTAT);
305 aerr0_log1 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_LOG1);
306 aerr0_log2 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_LOG2);
307 aerr0_log3 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_LOG3);
308
309 aerr1_devstat = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_DEVSTAT);
310 aerr1_log1 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_LOG1);
311 aerr1_log2 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_LOG2);
312 aerr1_log3 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_LOG3);
313
314 sbe_counts = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_SBE_COUNTS);
315 dbe_counts = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_DBE_COUNTS);
316
317 if (aerr0_log1|aerr0_log2|aerr0_log3
318 |aerr1_log1|aerr1_log2|aerr1_log3
319 |dbe_counts) {
320 printf("aerr0: stat %#x, logs: %#x, %#x, %#x\n",
321 aerr0_devstat, aerr0_log1, aerr0_log2, aerr0_log2);
322 printf("aerr1: stat %#x, logs: %#x, %#x, %#x\n",
323 aerr1_devstat, aerr1_log1, aerr1_log2, aerr1_log2);
324 printf("1-bit errors: %#x, 2-bit errors: %#x\n",
325 sbe_counts, dbe_counts);
326 return 1;
327 }
328 return 0;
329 }
330
331 static int
rmixl_addr_error_intr(void * arg)332 rmixl_addr_error_intr(void *arg)
333 {
334 int err;
335
336 err = rmixl_addr_error_check();
337 if (err != 0) {
338 #if DDB
339 printf("%s\n", __func__);
340 Debugger();
341 #endif
342 panic("Address Error");
343 }
344 return 1;
345 }
346