xref: /netbsd-src/sys/arch/powerpc/include/db_machdep.h (revision b85b508a3b55b844b825347defb7ac587107fa59)
1 /*	$OpenBSD: db_machdep.h,v 1.2 1997/03/21 00:48:48 niklas Exp $	*/
2 /*	$NetBSD: db_machdep.h,v 1.30 2021/03/11 08:33:34 simonb Exp $	*/
3 
4 /*
5  * Mach Operating System
6  * Copyright (c) 1992 Carnegie Mellon University
7  * All Rights Reserved.
8  *
9  * Permission to use, copy, modify and distribute this software and its
10  * documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
17  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie Mellon
27  * the rights to redistribute these changes.
28  */
29 
30 /*
31  * Machine-dependent defines for new kernel debugger.
32  */
33 #ifndef	_PPC_DB_MACHDEP_H_
34 #define	_PPC_DB_MACHDEP_H_
35 
36 #if defined(_KERNEL_OPT)
37 #include "opt_ppcarch.h"
38 #endif
39 
40 #include <uvm/uvm_prot.h>
41 #include <uvm/uvm_param.h>
42 #include <machine/trap.h>
43 
44 #define	DB_ELF_SYMBOLS
45 
46 typedef	vaddr_t		db_addr_t;	/* address - unsigned */
47 #define	DDB_EXPR_FMT	"l"		/* expression is long */
48 typedef	long		db_expr_t;	/* expression - signed */
49 struct powerpc_saved_state {
50 	u_int32_t	r[32];		/* data registers */
51 	u_int32_t	iar;
52 	u_int32_t	msr;
53 	u_int32_t	lr;
54 	u_int32_t	ctr;
55 	u_int32_t	cr;
56 	u_int32_t	xer;
57 	u_int32_t	mq;
58 	u_int32_t	dear;
59 	u_int32_t	esr;
60 	u_int32_t	pid;
61 };
62 typedef struct powerpc_saved_state db_regs_t;
63 extern	db_regs_t	ddb_regs;		/* register state */
64 #define DDB_REGS	(&ddb_regs)
65 
66 #define	PC_REGS(regs)	(*(db_addr_t *)&(regs)->iar)
67 
68 #define	BKPT_ADDR(addr)	(addr)		/* breakpoint address */
69 #define	BKPT_ASM	"trap"		/* should match BKPT_INST */
70 #define	BKPT_INST	0x7fe00008	/* breakpoint instruction */
71 #define	BKPT_SIZE	(4)		/* size of breakpoint inst */
72 #define	BKPT_SET(inst, addr)	(BKPT_INST)
73 
74 #if !defined(PPC_BOOKE) && !defined(PPC_IBM4XX)
75 #define	SR_SINGLESTEP	0x400		/* PSL_SE, available only for oea */
76 #define	db_clear_single_step(regs)	((regs)->msr &= ~SR_SINGLESTEP)
77 #define	db_set_single_step(regs)	((regs)->msr |=  SR_SINGLESTEP)
78 #else
79 #define	SOFTWARE_SSTEP
80 #endif
81 
82 #define T_BREAKPOINT	0xffff
83 #define	IS_BREAKPOINT_TRAP(type, code)	((type) == T_BREAKPOINT)
84 
85 #define T_WATCHPOINT	0xeeee
86 #ifdef T_WATCHPOINT
87 #define	IS_WATCHPOINT_TRAP(type, code)	((type) == T_WATCHPOINT)
88 #else
89 #define	IS_WATCHPOINT_TRAP(type, code)	0
90 #endif
91 
92 #define	M_RTS		0xfc0007ff
93 #define I_RTS		0x4c000020
94 #define	I_BLRL		0x4c000021
95 #define M_BC		0xfc000001
96 #define I_BC		0x40000000
97 #define I_BCL		0x40000001
98 #define M_B		0xfc000001
99 #define I_B		0x48000000
100 #define I_BL		0x48000001
101 #define	M_BCTR		0xfc0007ff
102 #define	I_BCTR		0x4c000420
103 #define	I_BCTRL		0x4c000421
104 #define	M_RFI		0xfc0007fe
105 #define	I_RFI		0x4c000064
106 
107 #define	inst_trap_return(ins)	(((ins)&M_RFI) == I_RFI)
108 #define	inst_return(ins)	(((ins)&M_RTS) == I_RTS)
109 #define	inst_call(ins)		(((ins)&M_BC  ) == I_BCL   || \
110 				 ((ins)&M_B   ) == I_BL    || \
111 				 ((ins)&M_BCTR) == I_BCTRL || \
112 				 ((ins)&M_RTS ) == I_BLRL )
113 #define	inst_branch(ins)	(((ins)&M_BC  ) == I_BC || \
114 				 ((ins)&M_B   ) == I_B  || \
115 				 ((ins)&M_BCTR) == I_BCTR )
116 #define	inst_unconditional_flow_transfer(ins)	\
117 				(((ins)&M_B   ) == I_B    || \
118 				 ((ins)&M_BCTR) == I_BCTR )
119 #define inst_load(ins)		0
120 #define inst_store(ins)		0
121 #if defined(PPC_IBM4XX) || defined(PPC_BOOKE)
122 #define next_instr_address(v, b) ((db_addr_t) ((b) ? (v) : ((v) + 4)))
123 extern db_addr_t branch_taken(int, db_addr_t, db_regs_t *);
124 #endif
125 
126 /*
127  * GDB's register array is:
128  *  32 4-byte GPRs
129  *  32 8-byte FPRs
130  *   7 4-byte UISA special-purpose registers
131  *  16 4-byte segment registers
132  *  32 4-byte standard OEA special-purpose registers,
133  * and up to 64 4-byte non-standard OES special-purpose registers.
134  * GDB keeps some extra space, so the total size of the register array
135  * they use is 880 bytes (gdb-5.0).
136  * KGDB_NUMREGS 220
137  */
138 /*
139  * GDB's register array of gdb-6.0 is defined in
140  * usr/src/gnu/dist/gdb6/gdb/regformats/reg-ppc.dat
141  * GDB's register array is:
142  *  32 4-byte GPRs
143  *  32 8-byte FPRs
144  *   7 4-byte UISA special-purpose registers: pc, ps, cr, lr, ctr, xer, fpscr
145  * index of pc in array: 32 + 2*32 = 96
146  * size 32 * 4 + 32 * 8 + 7 * 4 = 103 * 4 = 412 bytes
147  * KGD_NUMREGS 103
148  */
149 typedef long	kgdb_reg_t;
150 #define KGDB_PPC_PC_REG		96	/* first UISA SP register */
151 #define KGDB_PPC_MSR_REG	97
152 #define KGDB_PPC_CR_REG		98
153 #define KGDB_PPC_LR_REG		99
154 #define KGDB_PPC_CTR_REG	100
155 #define KGDB_PPC_XER_REG	101
156 #define KGDB_PPC_FPSCR_REG	102
157 #define KGDB_NUMREGS		103	/* Treat all registers as 4-byte */
158 #define KGDB_BUFLEN		(2*KGDB_NUMREGS*sizeof(kgdb_reg_t)+1)
159 
160 #ifdef _KERNEL
161 
162 void	kdb_kintr(void *);
163 int	kdb_trap(int, void *);
164 
165 bool	ddb_running_on_this_cpu_p(void);
166 bool	ddb_running_on_any_cpu_p(void);
167 void	db_resume_others(void);
168 
169 /*
170  * We have machine-dependent commands.
171  */
172 #define	DB_MACHINE_COMMANDS
173 
174 #endif /* _KERNEL */
175 
176 #endif	/* _PPC_DB_MACHDEP_H_ */
177