xref: /netbsd-src/sys/arch/riscv/dev/plicvar.h (revision 71aa81fb0f8f1a8a81c601b91dd631bed71d4705)
1 /* $NetBSD: plicvar.h,v 1.2 2023/09/02 09:58:15 skrll Exp $ */
2 
3 /*-
4  * Copyright (c) 2022 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * Portions of this code is derived from software contributed to The NetBSD
8  * Foundation by Simon Burge.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _RISCV_PLICVAR_H
33 #define	_RISCV_PLICVAR_H
34 
35 struct plic_intrhand {
36 	int	(*ih_func)(void *);
37 	void	*ih_arg;
38 	bool	ih_mpsafe;
39 	u_int	ih_irq;
40 	u_int	ih_hartid;
41 };
42 
43 struct plic_softc {
44 	device_t		sc_dev;
45 	bus_space_tag_t		sc_bst;
46 	bus_space_handle_t	sc_bsh;
47 
48 	uint32_t		sc_ndev;
49 
50 	uint32_t		sc_context[MAXCPUS];
51 	struct plic_intrhand	*sc_intr;
52 	struct evcnt		*sc_intrevs;
53 };
54 
55 
56 int	plic_intr(void *);
57 void	plic_enable(struct plic_softc *, u_int, u_int);
58 void	plic_disable(struct plic_softc *, u_int, u_int);
59 void	plic_set_priority(struct plic_softc *, u_int, uint32_t);
60 void	plic_set_threshold(struct plic_softc *, cpuid_t, uint32_t);
61 int	plic_attach_common(struct plic_softc *, bus_addr_t, bus_size_t);
62 
63 void *	plic_intr_establish_xname(u_int, int, int, int (*)(void *), void *,
64 	    const char *);
65 void	plic_intr_disestablish(void *);
66 
67 
68 #endif /* _RISCV_PLICVAR_H */
69