xref: /netbsd-src/sys/arch/powerpc/ibm4xx/dev/opbreg.h (revision 2692e2e238fd00b4477c93bd308bca5c3a5c1fce)
1 /*	$NetBSD: opbreg.h,v 1.2 2010/03/18 13:47:04 kiyohara Exp $	*/
2 
3 /*
4  * Copyright 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Simon Burge and Eduardo Horvath for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _IBM4XX_OPBREG_H_
39 #define	_IBM4XX_OPBREG_H_
40 
41 #define OPBREG_SIZE	0x1000
42 
43 /* OPB Arbiter Registers */
44 #define	OPBA_PR			0x00	/* Priority Register */
45 #define	OPBA_CR			0x01	/* Control Register */
46 
47 
48 /* ZMII Bridge (440EP/440GP/440GX) */
49 #define ZMII0_SIZE		0x10
50 #define ZMII0_FER		0x0	/* Function Enable Register */
51 #define   FER_MDI_MASK		  0x88880000	/* MDI enable */
52 #define   FER_MDI(emac)		  (1 << (31 - ((emac) << 2)))
53 #define   FER__MII_MASK		  0x7
54 #define   FER__MII_MII		  0x1		/* MII Enable */
55 #define   FER__MII_RMII		  0x2		/* ZMII (or RMII) Enable */
56 #define   FER__MII_SMII		  0x4		/* SMII Enable */
57 #define   FER__MII(emac, mii)	  ((mii) << (28 - ((emac) << 2)))
58 #define ZMII0_SSR		0x4	/* Speed Selection Register */
59 #define   SSR_SCI(emac)		  (0x4 << (28 - ((emac) << 2))) /* Suppress Collision Indication */
60 #define   SSR_FSS(emac)		  (0x2 << (28 - ((emac) << 2))) /* Force Speed Selection */
61 #define   SSR_SP_10MBPS		  0x0
62 #define   SSR_SP_100MBPS	  0x2
63 #define   SSR_ZSP(emac, sp)	  ((sp) << (27 - ((emac) << 2))) /* Speed Selection */
64 #define ZMII0_SMIISR		0x8	/* SMII Status Register */
65 #define   SMIISR_SHIFT(emac)	  (24 - ((emac) << 3))
66 #define   SMIISR_MASK		  0xff
67 #define   SMIISR_E1		  0x01		/* RxD Set to 1 */
68 #define   SMIISR_EC		  0x02		/* RxD False Carrier Detected */
69 #define   SMIISR_EN_INVALID	  0x00		/* RxD Nibble  Invalid */
70 #define   SMIISR_EN_VALID	  0x04		/* RxD Nibble  Valid */
71 #define   SMIISR_EJ_OK		  0x00		/* RxD Jabber  OK */
72 #define   SMIISR_EJ_ERROR	  0x08		/* RxD Jabber  Error */
73 #define   SMIISR_EL_DOWN	  0x00		/* RxD Link  Down */
74 #define   SMIISR_EL_UP		  0x10		/* RxD Link  Up */
75 #define   SMIISR_ED_HALF	  0x00		/* RxD Duplex  Half */
76 #define   SMIISR_ED_FULL	  0x20		/* RxD Duplex  Full */
77 #define   SMIISR_ES_10		  0x00		/* RxD Speed  10MBit */
78 #define   SMIISR_ES_100		  0x40		/* RxD Speed  100MBit */
79 #define   SMIISR_EF		  0x80		/* RxD from Previous Frame */
80 
81 #endif	/* _IBM4XX_OPBREG_H_ */
82