xref: /netbsd-src/sys/arch/evbarm/nslu2/nslu2_iic.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1 /*	$NetBSD: nslu2_iic.c,v 1.12 2021/08/07 16:18:50 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2006 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Steve C. Woodford.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/device.h>
36 #include <sys/mutex.h>
37 #include <sys/bus.h>
38 
39 #include <dev/i2c/i2cvar.h>
40 #include <dev/i2c/i2c_bitbang.h>
41 
42 #include <arm/xscale/ixp425reg.h>
43 #include <arm/xscale/ixp425var.h>
44 
45 #include <evbarm/nslu2/nslu2reg.h>
46 
47 struct slugiic_softc {
48 	struct i2c_controller sc_ic;
49 	struct i2c_bitbang_ops sc_ibo;
50 	uint32_t sc_dirout;
51 };
52 
53 static int
slugiic_send_start(void * arg,int flags)54 slugiic_send_start(void *arg, int flags)
55 {
56 	struct slugiic_softc *sc = arg;
57 
58 	return (i2c_bitbang_send_start(sc, flags, &sc->sc_ibo));
59 }
60 
61 static int
slugiic_send_stop(void * arg,int flags)62 slugiic_send_stop(void *arg, int flags)
63 {
64 	struct slugiic_softc *sc = arg;
65 
66 	return (i2c_bitbang_send_stop(sc, flags, &sc->sc_ibo));
67 }
68 
69 static int
slugiic_initiate_xfer(void * arg,i2c_addr_t addr,int flags)70 slugiic_initiate_xfer(void *arg, i2c_addr_t addr, int flags)
71 {
72 	struct slugiic_softc *sc = arg;
73 
74 	return (i2c_bitbang_initiate_xfer(sc, addr, flags, &sc->sc_ibo));
75 }
76 
77 static int
slugiic_read_byte(void * arg,uint8_t * vp,int flags)78 slugiic_read_byte(void *arg, uint8_t *vp, int flags)
79 {
80 	struct slugiic_softc *sc = arg;
81 
82 	return (i2c_bitbang_read_byte(sc, vp, flags, &sc->sc_ibo));
83 }
84 
85 static int
slugiic_write_byte(void * arg,uint8_t v,int flags)86 slugiic_write_byte(void *arg, uint8_t v, int flags)
87 {
88 	struct slugiic_softc *sc = arg;
89 
90 	return (i2c_bitbang_write_byte(sc, v, flags, &sc->sc_ibo));
91 }
92 
93 static void
slugiic_set_dir(void * arg,uint32_t bits)94 slugiic_set_dir(void *arg, uint32_t bits)
95 {
96 	struct slugiic_softc *sc = arg;
97 	uint32_t reg;
98 	int s;
99 
100 	if (sc->sc_dirout == bits)
101 		return;
102 
103 	s = splhigh();
104 
105 	sc->sc_dirout = bits;
106 
107 	if (sc->sc_dirout) {
108 		/* SDA is output; enable SDA output if SDA OUTR is low */
109 		reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
110 		if ((reg & GPIO_I2C_SDA_BIT) == 0) {
111 			reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
112 			reg &= ~GPIO_I2C_SDA_BIT;
113 			GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, reg);
114 		}
115 	} else {
116 		/* SDA is input; disable SDA output */
117 		reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
118 		reg |= GPIO_I2C_SDA_BIT;
119 		GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, reg);
120 	}
121 
122 	splx(s);
123 }
124 
125 static void
slugiic_set_bits(void * arg,uint32_t bits)126 slugiic_set_bits(void *arg, uint32_t bits)
127 {
128 	struct slugiic_softc *sc = arg;
129 	uint32_t oer, outr;
130 	int s;
131 
132 	s = splhigh();
133 
134 	/*
135 	 * Enable SCL output if the SCL line is to be driven low.
136 	 * Enable SDA output if the SDA line is to be driven low and
137 	 * SDA direction is output.
138 	 * Otherwise switch them to input even if directions are output
139 	 * so that we can emulate open collector output with the pullup
140 	 * resistors.
141 	 * If lines are to be set to high, disable OER first then set OUTR.
142 	 * If lines are to be set to low, set OUTR first then enable OER.
143 	 */
144 	oer = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
145 	if ((bits & GPIO_I2C_SCL_BIT) != 0)
146 		oer |= GPIO_I2C_SCL_BIT;
147 	if ((bits & GPIO_I2C_SDA_BIT) != 0)
148 		oer |= GPIO_I2C_SDA_BIT;
149 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, oer);
150 
151 	outr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
152 	outr &= ~(GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT);
153 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOUTR, outr | bits);
154 
155 	if ((bits & GPIO_I2C_SCL_BIT) == 0)
156 		oer &= ~GPIO_I2C_SCL_BIT;
157 	if ((bits & GPIO_I2C_SDA_BIT) == 0 && sc->sc_dirout)
158 		oer &= ~GPIO_I2C_SDA_BIT;
159 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, oer);
160 
161 	splx(s);
162 }
163 
164 static uint32_t
slugiic_read_bits(void * arg)165 slugiic_read_bits(void *arg)
166 {
167 	uint32_t reg;
168 
169 	reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPINR);
170 	return (reg & (GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT));
171 }
172 
173 static void
slugiic_deferred_attach(device_t self)174 slugiic_deferred_attach(device_t self)
175 {
176 	struct slugiic_softc *sc = device_private(self);
177 	struct i2cbus_attach_args iba;
178 	uint32_t reg;
179 
180 	reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
181 	reg |= GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT;
182 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOUTR, reg);
183 
184 	reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
185 	reg &= ~GPIO_I2C_SCL_BIT;
186 	reg |= GPIO_I2C_SDA_BIT;
187 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, reg);
188 
189 	memset(&iba, 0, sizeof(iba));
190 	iba.iba_tag = &sc->sc_ic;
191 	config_found(self, &iba, iicbus_print, CFARGS_NONE);
192 }
193 
194 static int
slugiic_match(device_t parent,cfdata_t cf,void * aux)195 slugiic_match(device_t parent, cfdata_t cf, void *aux)
196 {
197 
198 	return (1);
199 }
200 
201 static void
slugiic_attach(device_t parent,device_t self,void * aux)202 slugiic_attach(device_t parent, device_t self, void *aux)
203 {
204 	struct slugiic_softc *sc = device_private(self);
205 
206 	aprint_naive("\n");
207 	aprint_normal(": I2C bus\n");
208 
209 	iic_tag_init(&sc->sc_ic);
210 	sc->sc_ic.ic_cookie = sc;
211 	sc->sc_ic.ic_send_start = slugiic_send_start;
212 	sc->sc_ic.ic_send_stop = slugiic_send_stop;
213 	sc->sc_ic.ic_initiate_xfer = slugiic_initiate_xfer;
214 	sc->sc_ic.ic_read_byte = slugiic_read_byte;
215 	sc->sc_ic.ic_write_byte = slugiic_write_byte;
216 
217 	sc->sc_ibo.ibo_set_dir = slugiic_set_dir;
218 	sc->sc_ibo.ibo_set_bits = slugiic_set_bits;
219 	sc->sc_ibo.ibo_read_bits = slugiic_read_bits;
220 	sc->sc_ibo.ibo_bits[I2C_BIT_SDA] = GPIO_I2C_SDA_BIT;
221 	sc->sc_ibo.ibo_bits[I2C_BIT_SCL] = GPIO_I2C_SCL_BIT;
222 	sc->sc_ibo.ibo_bits[I2C_BIT_OUTPUT] = 1;
223 	sc->sc_ibo.ibo_bits[I2C_BIT_INPUT] = 0;
224 
225 	sc->sc_dirout = 0;
226 
227 	/*
228 	 * Defer until ixp425_softc has been initialised
229 	 */
230 	config_interrupts(self, slugiic_deferred_attach);
231 }
232 
233 CFATTACH_DECL_NEW(slugiic, sizeof(struct slugiic_softc),
234     slugiic_match, slugiic_attach, NULL, NULL);
235