1 /* $NetBSD: necpb.c,v 1.49 2023/12/07 03:46:10 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
35 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 * This product includes software developed by Charles M. Hannum.
48 * 4. The name of the author may not be used to endorse or promote products
49 * derived from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 */
62
63 #include <sys/cdefs.h>
64 __KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.49 2023/12/07 03:46:10 thorpej Exp $");
65
66 #include "opt_pci.h"
67
68 #include <sys/types.h>
69 #include <sys/param.h>
70 #include <sys/time.h>
71 #include <sys/systm.h>
72 #include <sys/errno.h>
73 #include <sys/device.h>
74 #include <sys/kmem.h>
75 #include <sys/vmem_impl.h>
76
77 #include <uvm/uvm_extern.h>
78
79 #define _ARC_BUS_DMA_PRIVATE
80 #include <sys/bus.h>
81
82 #include <machine/pio.h>
83
84 #include <machine/autoconf.h>
85 #include <machine/cpu.h>
86 #include <machine/platform.h>
87
88 #include <mips/cache.h>
89
90 #include <dev/pci/pcivar.h>
91 #include <dev/pci/pcireg.h>
92 #include <dev/pci/pcidevs.h>
93 #ifdef PCI_NETBSD_CONFIGURE
94 #include <dev/pci/pciconf.h>
95 #endif
96
97 #include <arc/jazz/rd94.h>
98 #include <arc/pci/necpbvar.h>
99
100 #include "ioconf.h"
101
102 static int necpbmatch(device_t, cfdata_t, void *);
103 static void necpbattach(device_t, device_t, void *);
104
105 static void necpb_attach_hook(device_t, device_t,
106 struct pcibus_attach_args *);
107 static int necpb_bus_maxdevs(pci_chipset_tag_t, int);
108 static pcitag_t necpb_make_tag(pci_chipset_tag_t, int, int, int);
109 static void necpb_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
110 int *, int *);
111 static pcireg_t necpb_conf_read(pci_chipset_tag_t, pcitag_t, int);
112 static void necpb_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
113 static int necpb_intr_map(const struct pci_attach_args *,
114 pci_intr_handle_t *);
115 static const char *necpb_intr_string(pci_chipset_tag_t, pci_intr_handle_t,
116 char *, size_t);
117 static void *necpb_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
118 int, int (*func)(void *), void *);
119 static void necpb_intr_disestablish(pci_chipset_tag_t, void *);
120 #ifdef PCI_NETBSD_CONFIGURE
121 static void necpb_conf_interrupt(pci_chipset_tag_t, int, int, int, int,
122 int *);
123 static int necpb_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t);
124 #endif
125
126 static uint32_t necpb_intr(uint32_t, struct clockframe *);
127
128
129 CFATTACH_DECL_NEW(necpb, sizeof(struct necpb_softc),
130 necpbmatch, necpbattach, NULL, NULL);
131
132 static struct necpb_intrhand *necpb_inttbl[4];
133
134 /* There can be only one. */
135 int necpbfound;
136 struct necpb_context necpb_main_context;
137
138 #define NECPB_MEM_BTAG_COUNT VMEM_EST_BTCOUNT(1, 10)
139 #define NECPB_IO_BTAG_COUNT VMEM_EST_BTCOUNT(1, 10)
140
141 static struct vmem necpb_mem_arena_store;
142 static struct vmem necpb_io_arena_store;
143 static struct vmem_btag necpb_mem_btag_store[NECPB_MEM_BTAG_COUNT];
144 static struct vmem_btag necpb_io_btag_store[NECPB_IO_BTAG_COUNT];
145
146 #define PCI_IO_START 0x00100000
147 #define PCI_IO_END 0x01ffffff
148 #define PCI_IO_SIZE ((PCI_IO_END - PCI_IO_START) + 1)
149
150 #define PCI_MEM_START 0x08000000
151 #define PCI_MEM_END 0x3fffffff
152 #define PCI_MEM_SIZE ((PCI_MEM_END - PCI_MEM_START) + 1)
153
154 static int
necpbmatch(device_t parent,cfdata_t cf,void * aux)155 necpbmatch(device_t parent, cfdata_t cf, void *aux)
156 {
157 struct confargs *ca = aux;
158
159 if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0)
160 return 0;
161
162 if (necpbfound)
163 return 0;
164
165 return 1;
166 }
167
168 /*
169 * Set up the chipset's function pointers.
170 */
171 void
necpb_init(struct necpb_context * ncp)172 necpb_init(struct necpb_context *ncp)
173 {
174 pci_chipset_tag_t pc;
175 #ifndef PCI_NETBSD_CONFIGURE
176 pcitag_t tag;
177 pcireg_t id, class, csr;
178 u_int dev;
179 #endif
180
181 if (ncp->nc_initialized)
182 return;
183
184 arc_large_bus_space_init(&ncp->nc_memt, "necpcimem",
185 RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM);
186 arc_bus_space_init_arena(&ncp->nc_memt, &necpb_mem_arena_store,
187 necpb_mem_btag_store, NECPB_MEM_BTAG_COUNT);
188
189 arc_bus_space_init(&ncp->nc_iot, "necpciio",
190 RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO);
191 arc_bus_space_init_arena(&ncp->nc_iot, &necpb_io_arena_store,
192 necpb_io_btag_store, NECPB_IO_BTAG_COUNT);
193
194 jazz_bus_dma_tag_init(&ncp->nc_dmat);
195
196 pc = &ncp->nc_pc;
197 pc->pc_attach_hook = necpb_attach_hook;
198 pc->pc_bus_maxdevs = necpb_bus_maxdevs;
199 pc->pc_make_tag = necpb_make_tag;
200 pc->pc_decompose_tag = necpb_decompose_tag;
201 pc->pc_conf_read = necpb_conf_read;
202 pc->pc_conf_write = necpb_conf_write;
203 pc->pc_intr_map = necpb_intr_map;
204 pc->pc_intr_string = necpb_intr_string;
205 pc->pc_intr_establish = necpb_intr_establish;
206 pc->pc_intr_disestablish = necpb_intr_disestablish;
207 #ifdef PCI_NETBSD_CONFIGURE
208 pc->pc_conf_interrupt = necpb_conf_interrupt;
209 pc->pc_conf_hook = necpb_conf_hook;
210 #endif
211
212 #ifndef PCI_NETBSD_CONFIGURE
213 /*
214 * XXX:
215 * NEC's firmware does not configure PCI devices completely.
216 * We need to disable expansion ROM and enable mem/io/busmaster
217 * bits here.
218 */
219 for (dev = 3; dev <= 5; dev++) {
220 tag = necpb_make_tag(pc, 0, dev, 0);
221 id = necpb_conf_read(pc, tag, PCI_ID_REG);
222
223 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
224 continue;
225
226 class = necpb_conf_read(pc, tag, PCI_CLASS_REG);
227 csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
228 if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
229 PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_PCI) {
230 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
231 necpb_conf_write(pc, tag, PCI_MAPREG_ROM, 0);
232 }
233 csr |= PCI_COMMAND_MASTER_ENABLE;
234 necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
235 }
236 #endif
237
238 ncp->nc_initialized = 1;
239 }
240
241 static void
necpbattach(device_t parent,device_t self,void * aux)242 necpbattach(device_t parent, device_t self, void *aux)
243 {
244 struct necpb_softc *sc = device_private(self);
245 struct pcibus_attach_args pba;
246 pci_chipset_tag_t pc;
247 int i;
248
249 sc->sc_dev = self;
250
251 necpbfound = 1;
252
253 aprint_normal("\n");
254
255 sc->sc_ncp = &necpb_main_context;
256 necpb_init(sc->sc_ncp);
257
258 pc = &sc->sc_ncp->nc_pc;
259 #ifdef PCI_NETBSD_CONFIGURE
260 struct pciconf_resources *pcires = pciconf_resource_init();
261 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
262 PCI_IO_START, PCI_IO_SIZE);
263 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
264 PCI_MEM_START, PCI_MEM_SIZE);
265 pci_configure_bus(pc, pcires, 0, mips_cache_info.mci_dcache_align);
266 pciconf_resource_fini(pcires);
267 #endif
268
269 out32(RD94_SYS_PCI_INTMASK, 0xf);
270
271 for (i = 0; i < 4; i++)
272 necpb_inttbl[i] = NULL;
273
274 (*platform->set_intr)(MIPS_INT_MASK_2, necpb_intr, ARC_INTPRI_PCIISA);
275
276 pba.pba_iot = &sc->sc_ncp->nc_iot;
277 pba.pba_memt = &sc->sc_ncp->nc_memt;
278 pba.pba_dmat = &sc->sc_ncp->nc_dmat;
279 pba.pba_dmat64 = NULL;
280 pba.pba_pc = pc;
281 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
282 pba.pba_bus = 0;
283 pba.pba_bridgetag = NULL;
284
285 config_found(self, &pba, pcibusprint, CFARGS_NONE);
286 }
287
288 static void
necpb_attach_hook(device_t parent,device_t self,struct pcibus_attach_args * pba)289 necpb_attach_hook(device_t parent, device_t self,
290 struct pcibus_attach_args *pba)
291 {
292 }
293
294 static int
necpb_bus_maxdevs(pci_chipset_tag_t pc,int busno)295 necpb_bus_maxdevs(pci_chipset_tag_t pc, int busno)
296 {
297
298 return 32;
299 }
300
301 static pcitag_t
necpb_make_tag(pci_chipset_tag_t pc,int bus,int device,int function)302 necpb_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
303 {
304 pcitag_t tag;
305
306 if (bus >= 256 || device >= 32 || function >= 8)
307 panic("%s: bad request", __func__);
308
309 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
310 return tag;
311 }
312
313 static void
necpb_decompose_tag(pci_chipset_tag_t pc,pcitag_t tag,int * bp,int * dp,int * fp)314 necpb_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
315 int *fp)
316 {
317
318 if (bp != NULL)
319 *bp = (tag >> 16) & 0xff;
320 if (dp != NULL)
321 *dp = (tag >> 11) & 0x1f;
322 if (fp != NULL)
323 *fp = (tag >> 8) & 0x07;
324 }
325
326 static pcireg_t
necpb_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg)327 necpb_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
328 {
329 pcireg_t data;
330 int s;
331
332 if ((unsigned int)reg >= PCI_CONF_SIZE)
333 return (pcireg_t) -1;
334
335 s = splhigh();
336 out32(RD94_SYS_PCI_CONFADDR, tag | reg);
337 data = in32(RD94_SYS_PCI_CONFDATA);
338 out32(RD94_SYS_PCI_CONFADDR, 0);
339 splx(s);
340
341 return data;
342 }
343
344 static void
necpb_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)345 necpb_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
346 {
347 int s;
348
349 if ((unsigned int)reg >= PCI_CONF_SIZE)
350 return;
351
352 s = splhigh();
353 out32(RD94_SYS_PCI_CONFADDR, tag | reg);
354 out32(RD94_SYS_PCI_CONFDATA, data);
355 out32(RD94_SYS_PCI_CONFADDR, 0);
356 splx(s);
357 }
358
359 static int
necpb_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)360 necpb_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
361 {
362 pci_chipset_tag_t pc = pa->pa_pc;
363 pcitag_t intrtag = pa->pa_intrtag;
364 int pin = pa->pa_intrpin;
365 int bus, dev;
366
367 if (pin == 0) {
368 /* No IRQ used. */
369 *ihp = -1;
370 return 1;
371 }
372
373 if (pin > 4) {
374 printf("necpb_intr_map: bad interrupt pin %d\n", pin);
375 *ihp = -1;
376 return 1;
377 }
378
379 necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL);
380 if (bus != 0) {
381 printf("necpb_intr_map: unknown bus %d\n", bus);
382 *ihp = -1;
383 return 1;
384 }
385
386 switch (dev) {
387 case 3:
388 *ihp = 3;
389 break;
390 case 4:
391 *ihp = 2;
392 break;
393 case 5:
394 *ihp = 1;
395 break;
396 default:
397 *ihp = -1;
398 return 1;
399 }
400
401 return 0;
402 }
403
404 static const char *
necpb_intr_string(pci_chipset_tag_t pc,pci_intr_handle_t ih,char * buf,size_t len)405 necpb_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
406 size_t len)
407 {
408 if (ih >= 4)
409 panic("%s: bogus handle %ld", __func__, ih);
410 snprintf(buf, len, "int %c", 'A' + (int)ih);
411 return buf;
412 }
413
414 static void *
necpb_intr_establish(pci_chipset_tag_t pc,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg)415 necpb_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
416 int (*func)(void *), void *arg)
417 {
418 struct necpb_intrhand *n, *p;
419 uint32_t mask;
420 char buf[PCI_INTRSTR_LEN];
421
422 if (ih >= 4)
423 panic("%s: bogus handle", __func__);
424
425 n = kmem_alloc(sizeof(*n), KM_SLEEP);
426 n->ih_func = func;
427 n->ih_arg = arg;
428 n->ih_next = NULL;
429 n->ih_intn = ih;
430 strlcpy(n->ih_evname, necpb_intr_string(pc, ih, buf, sizeof(buf)),
431 sizeof(n->ih_evname));
432 evcnt_attach_dynamic(&n->ih_evcnt, EVCNT_TYPE_INTR, NULL, "necpb",
433 n->ih_evname);
434
435 if (necpb_inttbl[ih] == NULL) {
436 necpb_inttbl[ih] = n;
437 mask = in32(RD94_SYS_PCI_INTMASK);
438 mask |= 1 << ih;
439 out32(RD94_SYS_PCI_INTMASK, mask);
440 } else {
441 p = necpb_inttbl[ih];
442 while (p->ih_next != NULL)
443 p = p->ih_next;
444 p->ih_next = n;
445 }
446
447 return n;
448 }
449
450 static void
necpb_intr_disestablish(pci_chipset_tag_t pc,void * cookie)451 necpb_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
452 {
453 struct necpb_intrhand *n, *p, *q;
454 uint32_t mask;
455
456 n = cookie;
457
458 q = NULL;
459 p = necpb_inttbl[n->ih_intn];
460 while (p != n) {
461 if (p == NULL)
462 panic("%s: broken intr table", __func__);
463 q = p;
464 p = p->ih_next;
465 }
466
467 if (q == NULL) {
468 necpb_inttbl[n->ih_intn] = n->ih_next;
469 if (n->ih_next == NULL) {
470 mask = in32(RD94_SYS_PCI_INTMASK);
471 mask &= ~(1 << n->ih_intn);
472 out32(RD94_SYS_PCI_INTMASK, mask);
473 }
474 } else
475 q->ih_next = n->ih_next;
476
477 evcnt_detach(&n->ih_evcnt);
478
479 kmem_free(n, sizeof(*n));
480 }
481
482 /*
483 * Handle PCI/EISA interrupt.
484 */
485 static uint32_t
necpb_intr(uint32_t mask,struct clockframe * cf)486 necpb_intr(uint32_t mask, struct clockframe *cf)
487 {
488 uint32_t vector, stat;
489 struct necpb_intrhand *p;
490 int i, handled;
491
492 handled = 0;
493 vector = in32(RD94_SYS_INTSTAT2) & 0xffff;
494
495 if (vector == 0x4000) {
496 stat = in32(RD94_SYS_PCI_INTSTAT);
497 stat &= in32(RD94_SYS_PCI_INTMASK);
498 for (i = 0; i < 4; i++) {
499 if (stat & (1 << i)) {
500 #if 0
501 printf("pint %d\n", i);
502 #endif
503 p = necpb_inttbl[i];
504 while (p != NULL) {
505 if ((*p->ih_func)(p->ih_arg)) {
506 p->ih_evcnt.ev_count++;
507 handled |= 1;
508 }
509 p = p->ih_next;
510 }
511 }
512 }
513 } else if (vector == 0x8000) {
514 printf("eisa_nmi\n");
515 } else {
516 printf("eint %d\n", vector & 0xff);
517 #if 0
518 if (eisa_intr(vector & 0xff)) {
519 handled |= 1;
520 }
521 #endif
522 }
523
524 return handled ? MIPS_INT_MASK_2 : 0;
525 }
526
527 #ifdef PCI_NETBSD_CONFIGURE
528 static void
necpb_conf_interrupt(pci_chipset_tag_t pc,int bus,int dev,int func,int swiz,int * iline)529 necpb_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int func,
530 int swiz, int *iline)
531 {
532
533 return;
534 }
535
536 static int
necpb_conf_hook(pci_chipset_tag_t pc,int bus,int dev,int func,pcireg_t id)537 necpb_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
538 pcireg_t id)
539 {
540
541 /* ignore bogus IDs */
542 if (id == 0)
543 return 0;
544
545 /* don't configure bridges */
546 if (bus == 0 && (dev == 1 || dev == 2))
547 return 0;
548
549 return PCI_CONF_DEFAULT;
550 }
551 #endif
552