xref: /netbsd-src/sys/arch/mips/rmi/rmixl_cpuvar.h (revision 3e67b5126ddeb22e44fbc51a3d61ae7f945500d3)
1 /*	$NetBSD: rmixl_cpuvar.h,v 1.2 2011/02/20 07:48:37 matt Exp $	*/
2 /*-
3  * Copyright (c) 2010 The NetBSD Foundation, Inc.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Cliff Neighbors.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_
32 #define _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_
33 
34 struct rmixl_cpu_trampoline_args {
35 	uint64_t	ta_sp;
36 	uint64_t	ta_lwp;
37 	uint64_t	ta_cpuinfo;
38 };
39 
40 struct rmixl_cpu_softc {
41 	device_t sc_dev;
42 	struct cpu_info *sc_ci;
43 	struct evcnt sc_vec_evcnts[64];
44 };
45 
46 #endif	/* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */
47