1 /* $NetBSD: meson8b_clkc.h,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _MESON8B_CLKC_H 30 #define _MESON8B_CLKC_H 31 32 #define MESON8B_RESET_CPU0_SOFT_RESET 3 33 #define MESON8B_RESET_CPU1_SOFT_RESET 4 34 #define MESON8B_RESET_CPU2_SOFT_RESET 5 35 #define MESON8B_RESET_CPU3_SOFT_RESET 6 36 37 #define MESON8B_CLOCK_XTAL 1 38 #define MESON8B_CLOCK_PLL_FIXED 2 39 #define MESON8B_CLOCK_PLL_VID 3 40 #define MESON8B_CLOCK_PLL_SYS 4 41 #define MESON8B_CLOCK_FCLK_DIV2 5 42 #define MESON8B_CLOCK_FCLK_DIV3 6 43 #define MESON8B_CLOCK_FCLK_DIV4 7 44 #define MESON8B_CLOCK_FCLK_DIV5 8 45 #define MESON8B_CLOCK_FCLK_DIV7 9 46 #define MESON8B_CLOCK_CLK81 10 47 #define MESON8B_CLOCK_MALI 11 48 #define MESON8B_CLOCK_CPUCLK 12 49 #define MESON8B_CLOCK_ZERO 13 50 #define MESON8B_CLOCK_MPEG_SEL 14 51 #define MESON8B_CLOCK_MPEG_DIV 15 52 #define MESON8B_CLOCK_DDR 16 53 #define MESON8B_CLOCK_DOS 17 54 #define MESON8B_CLOCK_ISA 18 55 #define MESON8B_CLOCK_PL301 19 56 #define MESON8B_CLOCK_PERIPHS 20 57 #define MESON8B_CLOCK_SPICC 21 58 #define MESON8B_CLOCK_I2C 22 59 #define MESON8B_CLOCK_SAR_ADC 23 60 #define MESON8B_CLOCK_SMART_CARD 24 61 #define MESON8B_CLOCK_RNG0 25 62 #define MESON8B_CLOCK_UART0 26 63 #define MESON8B_CLOCK_SDHC 27 64 #define MESON8B_CLOCK_STREAM 28 65 #define MESON8B_CLOCK_ASYNC_FIFO 29 66 #define MESON8B_CLOCK_SDIO 30 67 #define MESON8B_CLOCK_ABUF 31 68 #define MESON8B_CLOCK_HIU_IFACE 32 69 #define MESON8B_CLOCK_ASSIST_MISC 33 70 #define MESON8B_CLOCK_SPI 34 71 #define MESON8B_CLOCK_I2S_SPDIF 35 72 #define MESON8B_CLOCK_ETH 36 73 #define MESON8B_CLOCK_DEMUX 37 74 #define MESON8B_CLOCK_AIU_GLUE 38 75 #define MESON8B_CLOCK_IEC958 39 76 #define MESON8B_CLOCK_I2S_OUT 40 77 #define MESON8B_CLOCK_AMCLK 41 78 #define MESON8B_CLOCK_AIFIFO2 42 79 #define MESON8B_CLOCK_MIXER 43 80 #define MESON8B_CLOCK_MIXER_IFACE 44 81 #define MESON8B_CLOCK_ADC 45 82 #define MESON8B_CLOCK_BLKMV 46 83 #define MESON8B_CLOCK_AIU 47 84 #define MESON8B_CLOCK_UART1 48 85 #define MESON8B_CLOCK_G2D 49 86 #define MESON8B_CLOCK_USB0 50 87 #define MESON8B_CLOCK_USB1 51 88 #define MESON8B_CLOCK_RESET 52 89 #define MESON8B_CLOCK_NAND 53 90 #define MESON8B_CLOCK_DOS_PARSER 54 91 #define MESON8B_CLOCK_USB 55 92 #define MESON8B_CLOCK_VDIN1 56 93 #define MESON8B_CLOCK_AHB_ARB0 57 94 #define MESON8B_CLOCK_EFUSE 58 95 #define MESON8B_CLOCK_BOOT_ROM 59 96 #define MESON8B_CLOCK_AHB_DATA_BUS 60 97 #define MESON8B_CLOCK_AHB_CTRL_BUS 61 98 #define MESON8B_CLOCK_HDMI_INTR_SYNC 62 99 #define MESON8B_CLOCK_HDMI_PCLK 63 100 #define MESON8B_CLOCK_USB1_DDR_BRIDGE 64 101 #define MESON8B_CLOCK_USB0_DDR_BRIDGE 65 102 #define MESON8B_CLOCK_MMC_PCLK 66 103 #define MESON8B_CLOCK_DVIN 67 104 #define MESON8B_CLOCK_UART2 68 105 #define MESON8B_CLOCK_SANA 69 106 #define MESON8B_CLOCK_VPU_INTR 70 107 #define MESON8B_CLOCK_SEC_AHB_AHB3_BRIDGE 71 108 #define MESON8B_CLOCK_CLK81_A9 72 109 #define MESON8B_CLOCK_VCLK2_VENCI0 73 110 #define MESON8B_CLOCK_VCLK2_VENCI1 74 111 #define MESON8B_CLOCK_VCLK2_VENCP0 75 112 #define MESON8B_CLOCK_VCLK2_VENCP1 76 113 #define MESON8B_CLOCK_GCLK_VENCI_INT 77 114 #define MESON8B_CLOCK_GCLK_VENCP_INT 78 115 #define MESON8B_CLOCK_DAC_CLK 79 116 #define MESON8B_CLOCK_AOCLK_GATE 80 117 #define MESON8B_CLOCK_IEC958_GATE 81 118 #define MESON8B_CLOCK_ENC480P 82 119 #define MESON8B_CLOCK_RNG1 83 120 #define MESON8B_CLOCK_GCLK_VENCL_INT 84 121 #define MESON8B_CLOCK_VCLK2_VENCLMCC 85 122 #define MESON8B_CLOCK_VCLK2_VENCL 86 123 #define MESON8B_CLOCK_VCLK2_OTHER 87 124 #define MESON8B_CLOCK_EDP 88 125 #define MESON8B_CLOCK_AO_MEDIA_CPU 89 126 #define MESON8B_CLOCK_AO_AHB_SRAM 90 127 #define MESON8B_CLOCK_AO_AHB_BUS 91 128 #define MESON8B_CLOCK_AO_IFACE 92 129 #define MESON8B_CLOCK_MPLL0 93 130 #define MESON8B_CLOCK_MPLL1 94 131 #define MESON8B_CLOCK_MPLL2 95 132 #define MESON8B_CLOCK_MPLL0_DIV 96 133 #define MESON8B_CLOCK_MPLL1_DIV 97 134 #define MESON8B_CLOCK_MPLL2_DIV 98 135 #define MESON8B_CLOCK_CPU_IN_SEL 99 136 #define MESON8B_CLOCK_CPU_IN_DIV2 100 137 #define MESON8B_CLOCK_CPU_IN_DIV3 101 138 #define MESON8B_CLOCK_CPU_SCALE_DIV 102 139 #define MESON8B_CLOCK_CPU_SCALE_OUT_SEL 103 140 #define MESON8B_CLOCK_MPLL_PREDIV 104 141 #define MESON8B_CLOCK_FCLK_DIV2_DIV 105 142 #define MESON8B_CLOCK_FCLK_DIV3_DIV 106 143 #define MESON8B_CLOCK_FCLK_DIV4_DIV 107 144 #define MESON8B_CLOCK_FCLK_DIV5_DIV 108 145 #define MESON8B_CLOCK_FCLK_DIV7_DIV 109 146 #define MESON8B_CLOCK_NAND_SEL 110 147 #define MESON8B_CLOCK_NAND_DIV 111 148 #define MESON8B_CLOCK_NAND_CLK 112 149 #define MESON8B_CLOCK_PLL_FIXED_DCO 113 150 #define MESON8B_CLOCK_PLL_VID_DCO 114 151 #define MESON8B_CLOCK_PLL_SYS_DCO 115 152 #define MESON8B_CLOCK_CPU_CLK_DIV2 116 153 #define MESON8B_CLOCK_CPU_CLK_DIV3 117 154 #define MESON8B_CLOCK_CPU_CLK_DIV4 118 155 #define MESON8B_CLOCK_CPU_CLK_DIV5 119 156 #define MESON8B_CLOCK_CPU_CLK_DIV6 120 157 #define MESON8B_CLOCK_CPU_CLK_DIV7 121 158 #define MESON8B_CLOCK_CPU_CLK_DIV8 122 159 #define MESON8B_CLOCK_PERIPH_SEL 125 160 #define MESON8B_CLOCK_PERIPH 126 161 162 #endif /* _MESON8B_CLKC_H */ 163