1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mcpu=gfx1010 -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s 3; RUN: llc -mcpu=gfx900 -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s 4; RUN: llc -mcpu=gfx810 -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s 5; RUN: llc -mcpu=gfx1100 -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -check-prefix=GFX11 %s 6@esgs_ring = external addrspace(3) global [0 x i32], align 65536 7 8define amdgpu_gs void @main(ptr addrspace(8) %arg, i32 %arg1) { 9; GFX10-LABEL: main: 10; GFX10: ; %bb.0: ; %bb 11; GFX10-NEXT: s_mov_b32 s1, exec_lo 12; GFX10-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 13; GFX10-NEXT: v_readfirstlane_b32 s4, v0 14; GFX10-NEXT: v_readfirstlane_b32 s5, v1 15; GFX10-NEXT: v_readfirstlane_b32 s6, v2 16; GFX10-NEXT: v_readfirstlane_b32 s7, v3 17; GFX10-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] 18; GFX10-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] 19; GFX10-NEXT: s_and_b32 s0, vcc_lo, s0 20; GFX10-NEXT: s_and_saveexec_b32 s0, s0 21; GFX10-NEXT: buffer_load_format_d16_xyz v[5:6], v4, s[4:7], 0 idxen 22; GFX10-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 23; GFX10-NEXT: ; implicit-def: $vgpr4 24; GFX10-NEXT: s_waitcnt_depctr 0xffe3 25; GFX10-NEXT: s_xor_b32 exec_lo, exec_lo, s0 26; GFX10-NEXT: s_cbranch_execnz .LBB0_1 27; GFX10-NEXT: ; %bb.2: 28; GFX10-NEXT: s_mov_b32 exec_lo, s1 29; GFX10-NEXT: s_waitcnt vmcnt(0) 30; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v5 31; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v6 32; GFX10-NEXT: v_mov_b32_e32 v2, 0 33; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 34; GFX10-NEXT: ds_write2_b32 v2, v0, v1 offset0:7 offset1:8 35; 36; GFX9-LABEL: main: 37; GFX9: ; %bb.0: ; %bb 38; GFX9-NEXT: s_mov_b64 s[2:3], exec 39; GFX9-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 40; GFX9-NEXT: v_readfirstlane_b32 s4, v0 41; GFX9-NEXT: v_readfirstlane_b32 s5, v1 42; GFX9-NEXT: v_readfirstlane_b32 s6, v2 43; GFX9-NEXT: v_readfirstlane_b32 s7, v3 44; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[0:1] 45; GFX9-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[2:3] 46; GFX9-NEXT: s_and_b64 s[0:1], vcc, s[0:1] 47; GFX9-NEXT: s_and_saveexec_b64 s[0:1], s[0:1] 48; GFX9-NEXT: s_nop 0 49; GFX9-NEXT: buffer_load_format_d16_xyz v[5:6], v4, s[4:7], 0 idxen 50; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 51; GFX9-NEXT: ; implicit-def: $vgpr4 52; GFX9-NEXT: s_xor_b64 exec, exec, s[0:1] 53; GFX9-NEXT: s_cbranch_execnz .LBB0_1 54; GFX9-NEXT: ; %bb.2: 55; GFX9-NEXT: s_mov_b64 exec, s[2:3] 56; GFX9-NEXT: s_waitcnt vmcnt(0) 57; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5 58; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v6 59; GFX9-NEXT: v_mov_b32_e32 v2, 0 60; GFX9-NEXT: ds_write2_b32 v2, v0, v1 offset0:7 offset1:8 61; 62; GFX8-LABEL: main: 63; GFX8: ; %bb.0: ; %bb 64; GFX8-NEXT: s_mov_b64 s[2:3], exec 65; GFX8-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 66; GFX8-NEXT: v_readfirstlane_b32 s4, v0 67; GFX8-NEXT: v_readfirstlane_b32 s5, v1 68; GFX8-NEXT: v_readfirstlane_b32 s6, v2 69; GFX8-NEXT: v_readfirstlane_b32 s7, v3 70; GFX8-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[0:1] 71; GFX8-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[2:3] 72; GFX8-NEXT: s_and_b64 s[0:1], vcc, s[0:1] 73; GFX8-NEXT: s_and_saveexec_b64 s[0:1], s[0:1] 74; GFX8-NEXT: s_nop 0 75; GFX8-NEXT: buffer_load_format_d16_xyz v[5:6], v4, s[4:7], 0 idxen 76; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 77; GFX8-NEXT: ; implicit-def: $vgpr4 78; GFX8-NEXT: s_xor_b64 exec, exec, s[0:1] 79; GFX8-NEXT: s_cbranch_execnz .LBB0_1 80; GFX8-NEXT: ; %bb.2: 81; GFX8-NEXT: s_mov_b64 exec, s[2:3] 82; GFX8-NEXT: s_waitcnt vmcnt(0) 83; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v5 84; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v6 85; GFX8-NEXT: v_mov_b32_e32 v2, 0 86; GFX8-NEXT: s_mov_b32 m0, -1 87; GFX8-NEXT: ds_write2_b32 v2, v0, v1 offset0:7 offset1:8 88; 89; GFX11-LABEL: main: 90; GFX11: ; %bb.0: ; %bb 91; GFX11-NEXT: s_mov_b32 s1, exec_lo 92; GFX11-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 93; GFX11-NEXT: v_readfirstlane_b32 s4, v0 94; GFX11-NEXT: v_readfirstlane_b32 s5, v1 95; GFX11-NEXT: v_readfirstlane_b32 s6, v2 96; GFX11-NEXT: v_readfirstlane_b32 s7, v3 97; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) 98; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] 99; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] 100; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) 101; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0 102; GFX11-NEXT: s_and_saveexec_b32 s0, s0 103; GFX11-NEXT: buffer_load_d16_format_xyz v[5:6], v4, s[4:7], 0 idxen 104; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 105; GFX11-NEXT: ; implicit-def: $vgpr4 106; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0 107; GFX11-NEXT: s_cbranch_execnz .LBB0_1 108; GFX11-NEXT: ; %bb.2: 109; GFX11-NEXT: s_mov_b32 exec_lo, s1 110; GFX11-NEXT: s_waitcnt vmcnt(0) 111; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v5 112; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v1, 0xffff, v6 113; GFX11-NEXT: ds_store_2addr_b32 v2, v0, v1 offset0:7 offset1:8 114bb: 115 %i = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 undef) 116 %i2 = call nsz arcp <3 x half> @llvm.amdgcn.struct.ptr.buffer.load.format.v3f16(ptr addrspace(8) %arg, i32 %arg1, i32 0, i32 0, i32 0) 117 %i3 = bitcast <3 x half> %i2 to <3 x i16> 118 %i4 = extractelement <3 x i16> %i3, i32 1 119 %i5 = bitcast <3 x half> %i2 to <3 x i16> 120 %i6 = extractelement <3 x i16> %i5, i32 2 121 %i7 = zext i16 %i4 to i32 122 %i8 = zext i16 %i6 to i32 123 %i9 = add nuw nsw i32 0, 7 124 %i10 = getelementptr [0 x i32], ptr addrspace(3) @esgs_ring, i32 0, i32 %i9 125 store i32 %i7, ptr addrspace(3) %i10, align 4 126 %i11 = add nuw nsw i32 0, 8 127 %i12 = getelementptr [0 x i32], ptr addrspace(3) @esgs_ring, i32 0, i32 %i11 128 store i32 %i8, ptr addrspace(3) %i12, align 4 129 unreachable 130} 131; Function Attrs: nounwind readnone willreturn 132declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0 133; Function Attrs: nounwind readonly willreturn 134declare <3 x half> @llvm.amdgcn.struct.ptr.buffer.load.format.v3f16(ptr addrspace(8), i32, i32, i32, i32 immarg) #1 135attributes #0 = { nounwind readnone willreturn } 136attributes #1 = { nounwind readonly willreturn } 137