1 //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the WebAssembly-specific subclass of TargetMachine.
11 ///
12 //===----------------------------------------------------------------------===//
13
14 #include "WebAssemblyTargetMachine.h"
15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
16 #include "TargetInfo/WebAssemblyTargetInfo.h"
17 #include "Utils/WebAssemblyUtilities.h"
18 #include "WebAssembly.h"
19 #include "WebAssemblyMachineFunctionInfo.h"
20 #include "WebAssemblyTargetObjectFile.h"
21 #include "WebAssemblyTargetTransformInfo.h"
22 #include "llvm/CodeGen/MIRParser/MIParser.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/CodeGen/RegAllocRegistry.h"
26 #include "llvm/CodeGen/TargetPassConfig.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/InitializePasses.h"
29 #include "llvm/MC/MCAsmInfo.h"
30 #include "llvm/MC/TargetRegistry.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/Transforms/Scalar.h"
33 #include "llvm/Transforms/Scalar/LowerAtomicPass.h"
34 #include "llvm/Transforms/Utils.h"
35 #include <optional>
36 using namespace llvm;
37
38 #define DEBUG_TYPE "wasm"
39
40 // A command-line option to keep implicit locals
41 // for the purpose of testing with lit/llc ONLY.
42 // This produces output which is not valid WebAssembly, and is not supported
43 // by assemblers/disassemblers and other MC based tools.
44 static cl::opt<bool> WasmDisableExplicitLocals(
45 "wasm-disable-explicit-locals", cl::Hidden,
46 cl::desc("WebAssembly: output implicit locals in"
47 " instruction output for test purposes only."),
48 cl::init(false));
49
LLVMInitializeWebAssemblyTarget()50 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
51 // Register the target.
52 RegisterTargetMachine<WebAssemblyTargetMachine> X(
53 getTheWebAssemblyTarget32());
54 RegisterTargetMachine<WebAssemblyTargetMachine> Y(
55 getTheWebAssemblyTarget64());
56
57 // Register backend passes
58 auto &PR = *PassRegistry::getPassRegistry();
59 initializeWebAssemblyAddMissingPrototypesPass(PR);
60 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
61 initializeLowerGlobalDtorsLegacyPassPass(PR);
62 initializeFixFunctionBitcastsPass(PR);
63 initializeOptimizeReturnedPass(PR);
64 initializeWebAssemblyArgumentMovePass(PR);
65 initializeWebAssemblySetP2AlignOperandsPass(PR);
66 initializeWebAssemblyReplacePhysRegsPass(PR);
67 initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
68 initializeWebAssemblyMemIntrinsicResultsPass(PR);
69 initializeWebAssemblyRegStackifyPass(PR);
70 initializeWebAssemblyRegColoringPass(PR);
71 initializeWebAssemblyNullifyDebugValueListsPass(PR);
72 initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
73 initializeWebAssemblyLateEHPreparePass(PR);
74 initializeWebAssemblyExceptionInfoPass(PR);
75 initializeWebAssemblyCFGSortPass(PR);
76 initializeWebAssemblyCFGStackifyPass(PR);
77 initializeWebAssemblyExplicitLocalsPass(PR);
78 initializeWebAssemblyLowerBrUnlessPass(PR);
79 initializeWebAssemblyRegNumberingPass(PR);
80 initializeWebAssemblyDebugFixupPass(PR);
81 initializeWebAssemblyPeepholePass(PR);
82 initializeWebAssemblyMCLowerPrePassPass(PR);
83 initializeWebAssemblyLowerRefTypesIntPtrConvPass(PR);
84 initializeWebAssemblyFixBrTableDefaultsPass(PR);
85 initializeWebAssemblyDAGToDAGISelPass(PR);
86 }
87
88 //===----------------------------------------------------------------------===//
89 // WebAssembly Lowering public interface.
90 //===----------------------------------------------------------------------===//
91
getEffectiveRelocModel(std::optional<Reloc::Model> RM,const Triple & TT)92 static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM,
93 const Triple &TT) {
94 if (!RM) {
95 // Default to static relocation model. This should always be more optimial
96 // than PIC since the static linker can determine all global addresses and
97 // assume direct function calls.
98 return Reloc::Static;
99 }
100
101 if (!TT.isOSEmscripten()) {
102 // Relocation modes other than static are currently implemented in a way
103 // that only works for Emscripten, so disable them if we aren't targeting
104 // Emscripten.
105 return Reloc::Static;
106 }
107
108 return *RM;
109 }
110
111 /// Create an WebAssembly architecture model.
112 ///
WebAssemblyTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOpt::Level OL,bool JIT)113 WebAssemblyTargetMachine::WebAssemblyTargetMachine(
114 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
115 const TargetOptions &Options, std::optional<Reloc::Model> RM,
116 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
117 : LLVMTargetMachine(
118 T,
119 TT.isArch64Bit()
120 ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
121 "f128:64-n32:64-S128-ni:1:10:20"
122 : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
123 "n32:64-S128-ni:1:10:20")
124 : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
125 "f128:64-n32:64-S128-ni:1:10:20"
126 : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
127 "n32:64-S128-ni:1:10:20"),
128 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
129 getEffectiveCodeModel(CM, CodeModel::Large), OL),
130 TLOF(new WebAssemblyTargetObjectFile()) {
131 // WebAssembly type-checks instructions, but a noreturn function with a return
132 // type that doesn't match the context will cause a check failure. So we lower
133 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
134 // 'unreachable' instructions which is meant for that case.
135 this->Options.TrapUnreachable = true;
136
137 // WebAssembly treats each function as an independent unit. Force
138 // -ffunction-sections, effectively, so that we can emit them independently.
139 this->Options.FunctionSections = true;
140 this->Options.DataSections = true;
141 this->Options.UniqueSectionNames = true;
142
143 initAsmInfo();
144
145 // Note that we don't use setRequiresStructuredCFG(true). It disables
146 // optimizations than we're ok with, and want, such as critical edge
147 // splitting and tail merging.
148 }
149
150 WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
151
getSubtargetImpl() const152 const WebAssemblySubtarget *WebAssemblyTargetMachine::getSubtargetImpl() const {
153 return getSubtargetImpl(std::string(getTargetCPU()),
154 std::string(getTargetFeatureString()));
155 }
156
157 const WebAssemblySubtarget *
getSubtargetImpl(std::string CPU,std::string FS) const158 WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
159 std::string FS) const {
160 auto &I = SubtargetMap[CPU + FS];
161 if (!I) {
162 I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
163 }
164 return I.get();
165 }
166
167 const WebAssemblySubtarget *
getSubtargetImpl(const Function & F) const168 WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
169 Attribute CPUAttr = F.getFnAttribute("target-cpu");
170 Attribute FSAttr = F.getFnAttribute("target-features");
171
172 std::string CPU =
173 CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
174 std::string FS =
175 FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
176
177 // This needs to be done before we create a new subtarget since any
178 // creation will depend on the TM and the code generation flags on the
179 // function that reside in TargetOptions.
180 resetTargetOptions(F);
181
182 return getSubtargetImpl(CPU, FS);
183 }
184
185 namespace {
186
187 class CoalesceFeaturesAndStripAtomics final : public ModulePass {
188 // Take the union of all features used in the module and use it for each
189 // function individually, since having multiple feature sets in one module
190 // currently does not make sense for WebAssembly. If atomics are not enabled,
191 // also strip atomic operations and thread local storage.
192 static char ID;
193 WebAssemblyTargetMachine *WasmTM;
194
195 public:
CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine * WasmTM)196 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
197 : ModulePass(ID), WasmTM(WasmTM) {}
198
runOnModule(Module & M)199 bool runOnModule(Module &M) override {
200 FeatureBitset Features = coalesceFeatures(M);
201
202 std::string FeatureStr = getFeatureString(Features);
203 WasmTM->setTargetFeatureString(FeatureStr);
204 for (auto &F : M)
205 replaceFeatures(F, FeatureStr);
206
207 bool StrippedAtomics = false;
208 bool StrippedTLS = false;
209
210 if (!Features[WebAssembly::FeatureAtomics]) {
211 StrippedAtomics = stripAtomics(M);
212 StrippedTLS = stripThreadLocals(M);
213 } else if (!Features[WebAssembly::FeatureBulkMemory]) {
214 StrippedTLS |= stripThreadLocals(M);
215 }
216
217 if (StrippedAtomics && !StrippedTLS)
218 stripThreadLocals(M);
219 else if (StrippedTLS && !StrippedAtomics)
220 stripAtomics(M);
221
222 recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
223
224 // Conservatively assume we have made some change
225 return true;
226 }
227
228 private:
coalesceFeatures(const Module & M)229 FeatureBitset coalesceFeatures(const Module &M) {
230 FeatureBitset Features =
231 WasmTM
232 ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
233 std::string(WasmTM->getTargetFeatureString()))
234 ->getFeatureBits();
235 for (auto &F : M)
236 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
237 return Features;
238 }
239
getFeatureString(const FeatureBitset & Features)240 std::string getFeatureString(const FeatureBitset &Features) {
241 std::string Ret;
242 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
243 if (Features[KV.Value])
244 Ret += (StringRef("+") + KV.Key + ",").str();
245 }
246 return Ret;
247 }
248
replaceFeatures(Function & F,const std::string & Features)249 void replaceFeatures(Function &F, const std::string &Features) {
250 F.removeFnAttr("target-features");
251 F.removeFnAttr("target-cpu");
252 F.addFnAttr("target-features", Features);
253 }
254
stripAtomics(Module & M)255 bool stripAtomics(Module &M) {
256 // Detect whether any atomics will be lowered, since there is no way to tell
257 // whether the LowerAtomic pass lowers e.g. stores.
258 bool Stripped = false;
259 for (auto &F : M) {
260 for (auto &B : F) {
261 for (auto &I : B) {
262 if (I.isAtomic()) {
263 Stripped = true;
264 goto done;
265 }
266 }
267 }
268 }
269
270 done:
271 if (!Stripped)
272 return false;
273
274 LowerAtomicPass Lowerer;
275 FunctionAnalysisManager FAM;
276 for (auto &F : M)
277 Lowerer.run(F, FAM);
278
279 return true;
280 }
281
stripThreadLocals(Module & M)282 bool stripThreadLocals(Module &M) {
283 bool Stripped = false;
284 for (auto &GV : M.globals()) {
285 if (GV.isThreadLocal()) {
286 Stripped = true;
287 GV.setThreadLocal(false);
288 }
289 }
290 return Stripped;
291 }
292
recordFeatures(Module & M,const FeatureBitset & Features,bool Stripped)293 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
294 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
295 if (Features[KV.Value]) {
296 // Mark features as used
297 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
298 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
299 wasm::WASM_FEATURE_PREFIX_USED);
300 }
301 }
302 // Code compiled without atomics or bulk-memory may have had its atomics or
303 // thread-local data lowered to nonatomic operations or non-thread-local
304 // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
305 // to tell the linker that it would be unsafe to allow this code ot be used
306 // in a module with shared memory.
307 if (Stripped) {
308 M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
309 wasm::WASM_FEATURE_PREFIX_DISALLOWED);
310 }
311 }
312 };
313 char CoalesceFeaturesAndStripAtomics::ID = 0;
314
315 /// WebAssembly Code Generator Pass Configuration Options.
316 class WebAssemblyPassConfig final : public TargetPassConfig {
317 public:
WebAssemblyPassConfig(WebAssemblyTargetMachine & TM,PassManagerBase & PM)318 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
319 : TargetPassConfig(TM, PM) {}
320
getWebAssemblyTargetMachine() const321 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
322 return getTM<WebAssemblyTargetMachine>();
323 }
324
325 FunctionPass *createTargetRegisterAllocator(bool) override;
326
327 void addIRPasses() override;
328 void addISelPrepare() override;
329 bool addInstSelector() override;
330 void addOptimizedRegAlloc() override;
331 void addPostRegAlloc() override;
addGCPasses()332 bool addGCPasses() override { return false; }
333 void addPreEmitPass() override;
334 bool addPreISel() override;
335
336 // No reg alloc
addRegAssignAndRewriteFast()337 bool addRegAssignAndRewriteFast() override { return false; }
338
339 // No reg alloc
addRegAssignAndRewriteOptimized()340 bool addRegAssignAndRewriteOptimized() override { return false; }
341 };
342 } // end anonymous namespace
343
createMachineFunctionInfo(BumpPtrAllocator & Allocator,const Function & F,const TargetSubtargetInfo * STI) const344 MachineFunctionInfo *WebAssemblyTargetMachine::createMachineFunctionInfo(
345 BumpPtrAllocator &Allocator, const Function &F,
346 const TargetSubtargetInfo *STI) const {
347 return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
348 STI);
349 }
350
351 TargetTransformInfo
getTargetTransformInfo(const Function & F) const352 WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) const {
353 return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
354 }
355
356 TargetPassConfig *
createPassConfig(PassManagerBase & PM)357 WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
358 return new WebAssemblyPassConfig(*this, PM);
359 }
360
createTargetRegisterAllocator(bool)361 FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
362 return nullptr; // No reg alloc
363 }
364
365 using WebAssembly::WasmEnableEH;
366 using WebAssembly::WasmEnableEmEH;
367 using WebAssembly::WasmEnableEmSjLj;
368 using WebAssembly::WasmEnableSjLj;
369
basicCheckForEHAndSjLj(TargetMachine * TM)370 static void basicCheckForEHAndSjLj(TargetMachine *TM) {
371 // Before checking, we make sure TargetOptions.ExceptionModel is the same as
372 // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
373 // stores the exception model info in LangOptions, which is later transferred
374 // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
375 // clang's LangOptions is not used and thus the exception model info is not
376 // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
377 // have the correct exception model in in WebAssemblyMCAsmInfo constructor.
378 // But in this case TargetOptions is still not updated, so we make sure they
379 // are the same.
380 TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
381
382 // Basic Correctness checking related to -exception-model
383 if (TM->Options.ExceptionModel != ExceptionHandling::None &&
384 TM->Options.ExceptionModel != ExceptionHandling::Wasm)
385 report_fatal_error("-exception-model should be either 'none' or 'wasm'");
386 if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
387 report_fatal_error("-exception-model=wasm not allowed with "
388 "-enable-emscripten-cxx-exceptions");
389 if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
390 report_fatal_error(
391 "-wasm-enable-eh only allowed with -exception-model=wasm");
392 if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
393 report_fatal_error(
394 "-wasm-enable-sjlj only allowed with -exception-model=wasm");
395 if ((!WasmEnableEH && !WasmEnableSjLj) &&
396 TM->Options.ExceptionModel == ExceptionHandling::Wasm)
397 report_fatal_error(
398 "-exception-model=wasm only allowed with at least one of "
399 "-wasm-enable-eh or -wasm-enable-sjj");
400
401 // You can't enable two modes of EH at the same time
402 if (WasmEnableEmEH && WasmEnableEH)
403 report_fatal_error(
404 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
405 // You can't enable two modes of SjLj at the same time
406 if (WasmEnableEmSjLj && WasmEnableSjLj)
407 report_fatal_error(
408 "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
409 // You can't mix Emscripten EH with Wasm SjLj.
410 if (WasmEnableEmEH && WasmEnableSjLj)
411 report_fatal_error(
412 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
413 // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
414 // measure, but some code will error out at compile time in this combination.
415 // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
416 }
417
418 //===----------------------------------------------------------------------===//
419 // The following functions are called from lib/CodeGen/Passes.cpp to modify
420 // the CodeGen pass sequence.
421 //===----------------------------------------------------------------------===//
422
addIRPasses()423 void WebAssemblyPassConfig::addIRPasses() {
424 // Add signatures to prototype-less function declarations
425 addPass(createWebAssemblyAddMissingPrototypes());
426
427 // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
428 addPass(createLowerGlobalDtorsLegacyPass());
429
430 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
431 // to match.
432 addPass(createWebAssemblyFixFunctionBitcasts());
433
434 // Optimize "returned" function attributes.
435 if (getOptLevel() != CodeGenOpt::None)
436 addPass(createWebAssemblyOptimizeReturned());
437
438 basicCheckForEHAndSjLj(TM);
439
440 // If exception handling is not enabled and setjmp/longjmp handling is
441 // enabled, we lower invokes into calls and delete unreachable landingpad
442 // blocks. Lowering invokes when there is no EH support is done in
443 // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
444 // passes and Emscripten SjLj handling expects all invokes to be lowered
445 // before.
446 if (!WasmEnableEmEH && !WasmEnableEH) {
447 addPass(createLowerInvokePass());
448 // The lower invoke pass may create unreachable code. Remove it in order not
449 // to process dead blocks in setjmp/longjmp handling.
450 addPass(createUnreachableBlockEliminationPass());
451 }
452
453 // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
454 // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
455 // transformation algorithms with Emscripten SjLj, so we run
456 // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
457 if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
458 addPass(createWebAssemblyLowerEmscriptenEHSjLj());
459
460 // Expand indirectbr instructions to switches.
461 addPass(createIndirectBrExpandPass());
462
463 TargetPassConfig::addIRPasses();
464 }
465
addISelPrepare()466 void WebAssemblyPassConfig::addISelPrepare() {
467 // Lower atomics and TLS if necessary
468 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
469
470 // This is a no-op if atomics are not used in the module
471 addPass(createAtomicExpandPass());
472
473 TargetPassConfig::addISelPrepare();
474 }
475
addInstSelector()476 bool WebAssemblyPassConfig::addInstSelector() {
477 (void)TargetPassConfig::addInstSelector();
478 addPass(
479 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
480 // Run the argument-move pass immediately after the ScheduleDAG scheduler
481 // so that we can fix up the ARGUMENT instructions before anything else
482 // sees them in the wrong place.
483 addPass(createWebAssemblyArgumentMove());
484 // Set the p2align operands. This information is present during ISel, however
485 // it's inconvenient to collect. Collect it now, and update the immediate
486 // operands.
487 addPass(createWebAssemblySetP2AlignOperands());
488
489 // Eliminate range checks and add default targets to br_table instructions.
490 addPass(createWebAssemblyFixBrTableDefaults());
491
492 return false;
493 }
494
addOptimizedRegAlloc()495 void WebAssemblyPassConfig::addOptimizedRegAlloc() {
496 // Currently RegisterCoalesce degrades wasm debug info quality by a
497 // significant margin. As a quick fix, disable this for -O1, which is often
498 // used for debugging large applications. Disabling this increases code size
499 // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
500 // usually not used for production builds.
501 // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
502 // it properly
503 if (getOptLevel() == CodeGenOpt::Less)
504 disablePass(&RegisterCoalescerID);
505 TargetPassConfig::addOptimizedRegAlloc();
506 }
507
addPostRegAlloc()508 void WebAssemblyPassConfig::addPostRegAlloc() {
509 // TODO: The following CodeGen passes don't currently support code containing
510 // virtual registers. Consider removing their restrictions and re-enabling
511 // them.
512
513 // These functions all require the NoVRegs property.
514 disablePass(&MachineLateInstrsCleanupID);
515 disablePass(&MachineCopyPropagationID);
516 disablePass(&PostRAMachineSinkingID);
517 disablePass(&PostRASchedulerID);
518 disablePass(&FuncletLayoutID);
519 disablePass(&StackMapLivenessID);
520 disablePass(&PatchableFunctionID);
521 disablePass(&ShrinkWrapID);
522
523 // This pass hurts code size for wasm because it can generate irreducible
524 // control flow.
525 disablePass(&MachineBlockPlacementID);
526
527 TargetPassConfig::addPostRegAlloc();
528 }
529
addPreEmitPass()530 void WebAssemblyPassConfig::addPreEmitPass() {
531 TargetPassConfig::addPreEmitPass();
532
533 // Nullify DBG_VALUE_LISTs that we cannot handle.
534 addPass(createWebAssemblyNullifyDebugValueLists());
535
536 // Eliminate multiple-entry loops.
537 addPass(createWebAssemblyFixIrreducibleControlFlow());
538
539 // Do various transformations for exception handling.
540 // Every CFG-changing optimizations should come before this.
541 if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
542 addPass(createWebAssemblyLateEHPrepare());
543
544 // Now that we have a prologue and epilogue and all frame indices are
545 // rewritten, eliminate SP and FP. This allows them to be stackified,
546 // colored, and numbered with the rest of the registers.
547 addPass(createWebAssemblyReplacePhysRegs());
548
549 // Preparations and optimizations related to register stackification.
550 if (getOptLevel() != CodeGenOpt::None) {
551 // Depend on LiveIntervals and perform some optimizations on it.
552 addPass(createWebAssemblyOptimizeLiveIntervals());
553
554 // Prepare memory intrinsic calls for register stackifying.
555 addPass(createWebAssemblyMemIntrinsicResults());
556
557 // Mark registers as representing wasm's value stack. This is a key
558 // code-compression technique in WebAssembly. We run this pass (and
559 // MemIntrinsicResults above) very late, so that it sees as much code as
560 // possible, including code emitted by PEI and expanded by late tail
561 // duplication.
562 addPass(createWebAssemblyRegStackify());
563
564 // Run the register coloring pass to reduce the total number of registers.
565 // This runs after stackification so that it doesn't consider registers
566 // that become stackified.
567 addPass(createWebAssemblyRegColoring());
568 }
569
570 // Sort the blocks of the CFG into topological order, a prerequisite for
571 // BLOCK and LOOP markers.
572 addPass(createWebAssemblyCFGSort());
573
574 // Insert BLOCK and LOOP markers.
575 addPass(createWebAssemblyCFGStackify());
576
577 // Insert explicit local.get and local.set operators.
578 if (!WasmDisableExplicitLocals)
579 addPass(createWebAssemblyExplicitLocals());
580
581 // Lower br_unless into br_if.
582 addPass(createWebAssemblyLowerBrUnless());
583
584 // Perform the very last peephole optimizations on the code.
585 if (getOptLevel() != CodeGenOpt::None)
586 addPass(createWebAssemblyPeephole());
587
588 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
589 addPass(createWebAssemblyRegNumbering());
590
591 // Fix debug_values whose defs have been stackified.
592 if (!WasmDisableExplicitLocals)
593 addPass(createWebAssemblyDebugFixup());
594
595 // Collect information to prepare for MC lowering / asm printing.
596 addPass(createWebAssemblyMCLowerPrePass());
597 }
598
addPreISel()599 bool WebAssemblyPassConfig::addPreISel() {
600 TargetPassConfig::addPreISel();
601 addPass(createWebAssemblyLowerRefTypesIntPtrConv());
602 return false;
603 }
604
605 yaml::MachineFunctionInfo *
createDefaultFuncInfoYAML() const606 WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
607 return new yaml::WebAssemblyFunctionInfo();
608 }
609
convertFuncInfoToYAML(const MachineFunction & MF) const610 yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
611 const MachineFunction &MF) const {
612 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
613 return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
614 }
615
parseMachineFunctionInfo(const yaml::MachineFunctionInfo & MFI,PerFunctionMIParsingState & PFS,SMDiagnostic & Error,SMRange & SourceRange) const616 bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
617 const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
618 SMDiagnostic &Error, SMRange &SourceRange) const {
619 const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
620 MachineFunction &MF = PFS.MF;
621 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
622 return false;
623 }
624