1 /* $NetBSD: kfd_pm4_headers.h,v 1.3 2021/12/18 23:44:59 riastradh Exp $ */ 2 3 /* 4 * Copyright 2014 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 26 #ifndef KFD_PM4_HEADERS_H_ 27 #define KFD_PM4_HEADERS_H_ 28 29 #ifndef PM4_MES_HEADER_DEFINED 30 #define PM4_MES_HEADER_DEFINED 31 union PM4_MES_TYPE_3_HEADER { 32 struct { 33 /* reserved */ 34 uint32_t reserved1:8; 35 /* IT opcode */ 36 uint32_t opcode:8; 37 /* number of DWORDs - 1 in the information body */ 38 uint32_t count:14; 39 /* packet identifier. It should be 3 for type 3 packets */ 40 uint32_t type:2; 41 }; 42 uint32_t u32all; 43 }; 44 #endif /* PM4_MES_HEADER_DEFINED */ 45 46 47 /*--------------------MES_MAP_PROCESS-------------------- */ 48 49 #ifndef PM4_MES_MAP_PROCESS_DEFINED 50 #define PM4_MES_MAP_PROCESS_DEFINED 51 52 struct pm4_map_process { 53 union { 54 union PM4_MES_TYPE_3_HEADER header; /* header */ 55 uint32_t ordinal1; 56 }; 57 58 union { 59 struct { 60 uint32_t pasid:16; 61 uint32_t reserved1:8; 62 uint32_t diq_enable:1; 63 uint32_t process_quantum:7; 64 } bitfields2; 65 uint32_t ordinal2; 66 }; 67 68 union { 69 struct { 70 uint32_t page_table_base:28; 71 uint32_t reserved3:4; 72 } bitfields3; 73 uint32_t ordinal3; 74 }; 75 76 uint32_t sh_mem_bases; 77 uint32_t sh_mem_ape1_base; 78 uint32_t sh_mem_ape1_limit; 79 uint32_t sh_mem_config; 80 uint32_t gds_addr_lo; 81 uint32_t gds_addr_hi; 82 83 union { 84 struct { 85 uint32_t num_gws:6; 86 uint32_t reserved4:2; 87 uint32_t num_oac:4; 88 uint32_t reserved5:4; 89 uint32_t gds_size:6; 90 uint32_t num_queues:10; 91 } bitfields10; 92 uint32_t ordinal10; 93 }; 94 95 }; 96 #endif 97 98 #ifndef PM4_MES_MAP_PROCESS_DEFINED_KV_SCRATCH 99 #define PM4_MES_MAP_PROCESS_DEFINED_KV_SCRATCH 100 101 struct pm4_map_process_scratch_kv { 102 union { 103 union PM4_MES_TYPE_3_HEADER header; /* header */ 104 uint32_t ordinal1; 105 }; 106 107 union { 108 struct { 109 uint32_t pasid:16; 110 uint32_t reserved1:8; 111 uint32_t diq_enable:1; 112 uint32_t process_quantum:7; 113 } bitfields2; 114 uint32_t ordinal2; 115 }; 116 117 union { 118 struct { 119 uint32_t page_table_base:28; 120 uint32_t reserved2:4; 121 } bitfields3; 122 uint32_t ordinal3; 123 }; 124 125 uint32_t reserved3; 126 uint32_t sh_mem_bases; 127 uint32_t sh_mem_config; 128 uint32_t sh_mem_ape1_base; 129 uint32_t sh_mem_ape1_limit; 130 uint32_t sh_hidden_private_base_vmid; 131 uint32_t reserved4; 132 uint32_t reserved5; 133 uint32_t gds_addr_lo; 134 uint32_t gds_addr_hi; 135 136 union { 137 struct { 138 uint32_t num_gws:6; 139 uint32_t reserved6:2; 140 uint32_t num_oac:4; 141 uint32_t reserved7:4; 142 uint32_t gds_size:6; 143 uint32_t num_queues:10; 144 } bitfields14; 145 uint32_t ordinal14; 146 }; 147 148 uint32_t completion_signal_lo32; 149 uint32_t completion_signal_hi32; 150 }; 151 #endif 152 153 enum { 154 CACHE_FLUSH_AND_INV_TS_EVENT = 0x00000014 155 }; 156 157 #endif /* KFD_PM4_HEADERS_H_ */ 158