1/* $NetBSD: irq_dispatch.S,v 1.17 2020/11/21 19:46:13 skrll Exp $ */ 2 3/* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35/* 36 * Copyright (c) 2002, 2003 Wasabi Systems, Inc. 37 * All rights reserved. 38 * 39 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed for the NetBSD Project by 52 * Wasabi Systems, Inc. 53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 54 * or promote products derived from this software without specific prior 55 * written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70#include "assym.h" 71 72#include <machine/asm.h> 73 74#include <arm/locore.h> 75 76#include "opt_arm_intr_impl.h" 77#ifdef ARM_INTR_IMPL 78#include ARM_INTR_IMPL 79#else 80#error ARM_INTR_IMPL not defined 81#endif 82 83#ifndef ARM_IRQ_HANDLER 84#error ARM_IRQ_HANDLER not defined 85#endif 86 87/* 88 * irq_entry: 89 * Main entry point for the IRQ vector. This is a generic version 90 * which can be used by different platforms. 91 */ 92 .text 93 .p2align 5 94ARM_ASENTRY_NP(irq_entry) 95 sub lr, lr, #0x00000004 /* Adjust the lr */ 96 97 PUSHFRAMEINSVC /* Push an interrupt frame */ 98 ENABLE_ALIGNMENT_FAULTS /* puts cur{cpu,lwp} in r4/r5 */ 99 100#ifdef _ARM_ARCH_7 101 clrex /* force all strex to fail */ 102 dmb /* synchronize memory writes */ 103#endif 104 105 /* 106 * Increment the interrupt nesting depth and call the interrupt 107 * dispatch routine. We've pushed a frame, so we can safely use 108 * callee-saved regs here. We use the following registers, which 109 * we expect to persist: 110 * 111 * r4 address of current cpu_info (curcpu) 112 * r5 address of current lwp (curlwp) 113 * r6 old value of `ci_intr_depth' 114 */ 115 ldr r6, [r4, #CI_INTR_DEPTH] 116 add r1, r6, #1 117 str r1, [r4, #CI_INTR_DEPTH] 118 119 mov r0, sp /* arg for dispatcher */ 120 bl ARM_IRQ_HANDLER 121 122 /* 123 * Restore the old interrupt depth value (which should be the 124 * same as decrementing it at this point). 125 */ 126 str r6, [r4, #CI_INTR_DEPTH] 127 128 LOCK_CAS_CHECK 129 130 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS 131 PULLFRAMEFROMSVCANDEXIT 132#ifdef __thumb__ 133 subs pc, lr, #0 /* Exit */ 134#else 135 movs pc, lr /* Exit */ 136#endif 137 138 .align 0 139LOCK_CAS_CHECK_LOCALS 140 141AST_ALIGNMENT_FAULT_LOCALS 142ASEND(irq_entry) 143 144 .p2align 5 145ARM_ASENTRY_NP(irq_idle_entry) 146 PUSHIDLEFRAME 147 148 /* 149 * Increment the interrupt nesting depth and call the interrupt 150 * dispatch routine. We've pushed a frame, so we can safely use 151 * callee-saved regs here. We use the following registers, which 152 * we expect to persist: 153 * 154 * r4 address of current cpu_info 155 * r6 old value of `ci_intr_depth' 156 */ 157 GET_CURCPU(r4) 158 ldr r6, [r4, #CI_INTR_DEPTH] 159 add r1, r6, #1 160 str r1, [r4, #CI_INTR_DEPTH] 161 162#ifdef _ARM_ARCH_7 163 clrex /* force all strex to fail */ 164 dmb /* synchronize memory writes */ 165#endif 166 167 mov r0, sp /* arg for dispatcher */ 168 bl ARM_IRQ_HANDLER 169 170 /* 171 * Restore the old interrupt depth value (which should be the 172 * same as decrementing it at this point). 173 */ 174 str r6, [r4, #CI_INTR_DEPTH] 175 176#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) 177 ldr r2, [r4, #CI_CPL] /* Get current priority level */ 178 ldr r3, [r4, #CI_SOFTINTS] /* Get pending softint mask */ 179#endif 180 181 PULLIDLEFRAME /* restore r4, r6, sp, lr */ 182 183#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) 184 lsrs r3, r3, r2 /* shift mask by cpl */ 185 bne _C_LABEL(dosoftints) /* dosoftints(void) */ 186#endif 187 RET 188ASEND(irq_idle_entry) 189