xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ipp.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: ipp.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2017 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 #ifndef __DAL_IPP_H__
29 #define __DAL_IPP_H__
30 
31 #include "hw_shared.h"
32 #include "dc_hw_types.h"
33 
34 #define MAXTRIX_COEFFICIENTS_NUMBER 12
35 #define MAXTRIX_COEFFICIENTS_WRAP_NUMBER (MAXTRIX_COEFFICIENTS_NUMBER + 4)
36 #define MAX_OVL_MATRIX_COUNT 12
37 
38 /* IPP RELATED */
39 struct input_pixel_processor {
40 	struct  dc_context *ctx;
41 	unsigned int inst;
42 	const struct ipp_funcs *funcs;
43 };
44 
45 enum ipp_prescale_mode {
46 	IPP_PRESCALE_MODE_BYPASS,
47 	IPP_PRESCALE_MODE_FIXED_SIGNED,
48 	IPP_PRESCALE_MODE_FLOAT_SIGNED,
49 	IPP_PRESCALE_MODE_FIXED_UNSIGNED,
50 	IPP_PRESCALE_MODE_FLOAT_UNSIGNED
51 };
52 
53 struct ipp_prescale_params {
54 	enum ipp_prescale_mode mode;
55 	uint16_t bias;
56 	uint16_t scale;
57 };
58 
59 
60 
61 enum ovl_color_space {
62 	OVL_COLOR_SPACE_UNKNOWN = 0,
63 	OVL_COLOR_SPACE_RGB,
64 	OVL_COLOR_SPACE_YUV601,
65 	OVL_COLOR_SPACE_YUV709
66 };
67 
68 
69 struct ipp_funcs {
70 
71 	/*** cursor ***/
72 	void (*ipp_cursor_set_position)(
73 		struct input_pixel_processor *ipp,
74 		const struct dc_cursor_position *position,
75 		const struct dc_cursor_mi_param *param);
76 
77 	void (*ipp_cursor_set_attributes)(
78 		struct input_pixel_processor *ipp,
79 		const struct dc_cursor_attributes *attributes);
80 
81 	/*** setup input pixel processing ***/
82 
83 	/* put the entire pixel processor to bypass */
84 	void (*ipp_full_bypass)(
85 			struct input_pixel_processor *ipp);
86 
87 	/* setup ipp to expand/convert input to pixel processor internal format */
88 	void (*ipp_setup)(
89 		struct input_pixel_processor *ipp,
90 		enum surface_pixel_format format,
91 		enum expansion_mode mode,
92 		struct dc_csc_transform input_csc_color_matrix,
93 		enum dc_color_space input_color_space);
94 
95 	/* DCE function to setup IPP.  TODO: see if we can consolidate to setup */
96 	void (*ipp_program_prescale)(
97 			struct input_pixel_processor *ipp,
98 			struct ipp_prescale_params *params);
99 
100 	void (*ipp_program_input_lut)(
101 			struct input_pixel_processor *ipp,
102 			const struct dc_gamma *gamma);
103 
104 	/*** DEGAMMA RELATED ***/
105 	void (*ipp_set_degamma)(
106 		struct input_pixel_processor *ipp,
107 		enum ipp_degamma_mode mode);
108 
109 	void (*ipp_program_degamma_pwl)(
110 		struct input_pixel_processor *ipp,
111 		const struct pwl_params *params);
112 
113 	void (*ipp_destroy)(struct input_pixel_processor **ipp);
114 };
115 
116 #endif /* __DAL_IPP_H__ */
117