1 /* $NetBSD: ipaq_lcd.c,v 1.22 2021/08/07 16:18:53 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Ichiro FUKUHARA (ichiro@ichiro.org).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ipaq_lcd.c,v 1.22 2021/08/07 16:18:53 thorpej Exp $");
34
35 #define IPAQ_LCD_DEBUG
36
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/time.h>
42 #include <sys/device.h>
43 #include <sys/bus.h>
44
45 #include <uvm/uvm_extern.h>
46
47 #include <dev/wscons/wsconsio.h>
48
49 #include <machine/bootinfo.h>
50 #include <machine/intr.h>
51 #include <arm/cpufunc.h>
52
53 #include <arm/sa11x0/sa11x0_reg.h>
54 #include <arm/sa11x0/sa11x0_gpioreg.h>
55
56 #include <hpcarm/dev/ipaq_gpioreg.h>
57 #include <hpcarm/dev/ipaq_saipvar.h>
58 #include <hpcarm/dev/ipaq_lcdreg.h>
59 #include <hpcarm/dev/ipaq_lcdvar.h>
60
61 #ifdef IPAQ_LCD_DEBUG
62 #define DPRINTFN(n, x) if (ipaqlcddebug > (n)) aprint_normal x
63 int ipaqlcddebug = 0xff;
64 #else
65 #define DPRINTFN(n, x)
66 #endif
67 #define DPRINTF(x) DPRINTFN(0, x)
68
69 static int ipaqlcd_match(device_t, cfdata_t, void *);
70 static void ipaqlcd_attach(device_t, device_t, void *);
71 static void ipaqlcd_init(struct ipaqlcd_softc *);
72 static int ipaqlcd_fbinit(struct ipaqlcd_softc *);
73 static int ipaqlcd_ioctl(void *, u_long, void *, int, struct lwp *);
74 static paddr_t ipaqlcd_mmap(void *, off_t, int);
75
76 #if defined __mips__ || defined __sh__ || defined __arm__
77 #define __BTOP(x) ((paddr_t)(x) >> PGSHIFT)
78 #define __PTOB(x) ((paddr_t)(x) << PGSHIFT)
79 #else
80 #error "define btop, ptob."
81 #endif
82
83 CFATTACH_DECL_NEW(ipaqlcd, sizeof(struct ipaqlcd_softc),
84 ipaqlcd_match, ipaqlcd_attach, NULL, NULL);
85
86 struct hpcfb_accessops ipaqlcd_ha = {
87 ipaqlcd_ioctl, ipaqlcd_mmap
88 };
89 static int console_flag = 0;
90
91 static int
ipaqlcd_match(device_t parent,cfdata_t match,void * aux)92 ipaqlcd_match(device_t parent, cfdata_t match, void *aux)
93 {
94 return (1);
95 }
96
97 void
ipaqlcd_attach(device_t parent,device_t self,void * aux)98 ipaqlcd_attach(device_t parent, device_t self, void *aux)
99 {
100 struct ipaqlcd_softc *sc = device_private(self);
101 struct hpcfb_attach_args ha;
102 struct ipaq_softc *psc = device_private(parent);
103
104 sc->sc_dev = self;
105 sc->sc_iot = psc->sc_iot;
106 sc->sc_parent = psc;
107
108 ipaqlcd_init(sc);
109 ipaqlcd_fbinit(sc);
110
111 aprint_normal("\n");
112 aprint_normal_dev(self, "iPAQ internal LCD controller\n");
113
114 DPRINTF(("framebuffer_baseaddr=%lx\n", (u_long)bootinfo->fb_addr));
115
116 ha.ha_console = console_flag;
117 ha.ha_accessops = &ipaqlcd_ha;
118 ha.ha_accessctx = sc;
119 ha.ha_curfbconf = 0;
120 ha.ha_nfbconf = 1;
121 ha.ha_fbconflist = &sc->sc_fbconf;
122 ha.ha_curdspconf = 0;
123 ha.ha_ndspconf = 1;
124 ha.ha_dspconflist = &sc->sc_dspconf;
125
126 config_found(sc->sc_dev, &ha, hpcfbprint, CFARGS_NONE);
127 }
128
129 void
ipaqlcd_init(struct ipaqlcd_softc * sc)130 ipaqlcd_init(struct ipaqlcd_softc *sc)
131 {
132 /* Initialization of Extended GPIO */
133 sc->sc_parent->ipaq_egpio |= EGPIO_LCD_INIT;
134 bus_space_write_2(sc->sc_iot, sc->sc_parent->sc_egpioh,
135 0, sc->sc_parent->ipaq_egpio);
136
137 if (bus_space_map(sc->sc_iot, SALCD_BASE, SALCD_NPORTS,
138 0, &sc->sc_ioh))
139 panic("ipaqlcd_init:Cannot map registers");
140
141 bootinfo->fb_addr = (void *)
142 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_BA1);
143
144 /*
145 * Initialize LCD Control Register 0 - 3
146 * must initialize DMA Channel Base Address Register
147 * before enabling LCD(LEN = 1)
148 */
149 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
150 SALCD_CR1, IPAQ_LCCR1);
151 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
152 SALCD_CR2, IPAQ_LCCR2);
153 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
154 SALCD_CR3, IPAQ_LCCR3);
155 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
156 SALCD_CR0, IPAQ_LCCR0);
157
158 DPRINTF(("\n"
159 "DMA_BASE= %08x : DMA_CUR = %08x \n"
160 "LCCR0 = %08x : LCCR1 = %08x \n"
161 "LCCR2 = %08x : LCCR3 = %08x",
162 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_BA1),
163 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CA1),
164 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR0),
165 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR1),
166 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR2),
167 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR3)));
168
169 }
170
171 int
ipaqlcd_fbinit(struct ipaqlcd_softc * sc)172 ipaqlcd_fbinit(struct ipaqlcd_softc *sc)
173 {
174 struct hpcfb_fbconf *fb;
175
176 fb = &sc->sc_fbconf;
177
178 /* Initialize fb */
179 memset(fb, 0, sizeof(*fb));
180
181 fb->hf_conf_index = 0; /* configuration index */
182 fb->hf_nconfs = 1;
183 strcpy(fb->hf_name, "built-in video");
184 strcpy(fb->hf_conf_name, "LCD");
185 /* configuration name */
186 fb->hf_height = bootinfo->fb_height;
187 fb->hf_width = bootinfo->fb_width;
188
189 if (bus_space_map(sc->sc_iot, (bus_addr_t)bootinfo->fb_addr,
190 bootinfo->fb_height * bootinfo->fb_line_bytes,
191 0, &fb->hf_baseaddr)) {
192 aprint_normal("unable to map framebuffer\n");
193 return (-1);
194 }
195
196 fb->hf_offset = (u_long)bootinfo->fb_addr -
197 __PTOB(__BTOP(bootinfo->fb_addr));
198 /* frame buffer start offset */
199 fb->hf_bytes_per_line = bootinfo->fb_line_bytes;
200 fb->hf_nplanes = 1;
201 fb->hf_bytes_per_plane = bootinfo->fb_height *
202 bootinfo->fb_line_bytes;
203
204 fb->hf_access_flags |= HPCFB_ACCESS_BYTE;
205 fb->hf_access_flags |= HPCFB_ACCESS_WORD;
206 fb->hf_access_flags |= HPCFB_ACCESS_DWORD;
207
208 switch (bootinfo->fb_type) {
209 /*
210 * gray scale
211 */
212 case BIFB_D2_M2L_3:
213 case BIFB_D2_M2L_3x2:
214 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE;
215 case BIFB_D2_M2L_0:
216 case BIFB_D2_M2L_0x2:
217 fb->hf_class = HPCFB_CLASS_GRAYSCALE;
218 break;
219 case BIFB_D4_M2L_F:
220 case BIFB_D4_M2L_Fx2:
221 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE;
222 case BIFB_D4_M2L_0:
223 case BIFB_D4_M2L_0x2:
224 fb->hf_class = HPCFB_CLASS_GRAYSCALE;
225 break;
226 /*
227 * indexed color
228 */
229 case BIFB_D8_FF:
230 case BIFB_D8_00:
231 fb->hf_offset = 0x200;
232 break;
233 /*
234 * RGB color
235 */
236 case BIFB_D16_FFFF:
237 case BIFB_D16_0000:
238 fb->hf_class = HPCFB_CLASS_RGBCOLOR;
239 fb->hf_access_flags |= HPCFB_ACCESS_STATIC;
240 fb->hf_order_flags = HPCFB_REVORDER_BYTE;
241 fb->hf_pack_width = 16;
242 fb->hf_pixels_per_pack = 1;
243 fb->hf_pixel_width = 16;
244
245 fb->hf_class_data_length = sizeof(struct hf_rgb_tag);
246 fb->hf_u.hf_rgb.hf_flags = 0;
247 /* reserved for future use */
248 fb->hf_u.hf_rgb.hf_red_width = 5;
249 fb->hf_u.hf_rgb.hf_red_shift = 11;
250 fb->hf_u.hf_rgb.hf_green_width = 6;
251 fb->hf_u.hf_rgb.hf_green_shift = 5;
252 fb->hf_u.hf_rgb.hf_blue_width = 5;
253 fb->hf_u.hf_rgb.hf_blue_shift = 0;
254 fb->hf_u.hf_rgb.hf_alpha_width = 0;
255 fb->hf_u.hf_rgb.hf_alpha_shift = 0;
256 break;
257 default :
258 aprint_normal("unknown type (=%d).\n",
259 bootinfo->fb_type);
260 return (-1);
261 break;
262 }
263
264 return(0);
265 }
266
267 int
ipaqlcd_ioctl(void * v,u_long cmd,void * data,int flag,struct lwp * l)268 ipaqlcd_ioctl(void *v, u_long cmd, void *data, int flag, struct lwp *l)
269 {
270 struct ipaqlcd_softc *sc = (struct ipaqlcd_softc *)v;
271 struct hpcfb_fbconf *fbconf;
272 struct hpcfb_dspconf *dspconf;
273 struct wsdisplay_cmap *cmap;
274 struct wsdisplay_param *dispparam;
275
276 switch (cmd) {
277 case WSDISPLAYIO_GETCMAP:
278 cmap = (struct wsdisplay_cmap*)data;
279
280 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR ||
281 sc->sc_fbconf.hf_pack_width != 8 ||
282 256 <= cmap->index ||
283 256 < (cmap->index + cmap->count))
284 return (EINVAL);
285 return (0);
286 case WSDISPLAYIO_PUTCMAP:
287 return (EINVAL);
288 case WSDISPLAYIO_GETPARAM:
289 dispparam = (struct wsdisplay_param*)data;
290 switch (dispparam->param) {
291 case WSDISPLAYIO_PARAM_BACKLIGHT:
292 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BACKLIGHT\n"));
293 return (EINVAL);
294 case WSDISPLAYIO_PARAM_CONTRAST:
295 DPRINTF(("ipaqlcd_ioctl: GETPARAM:CONTRAST\n"));
296 return (EINVAL);
297 case WSDISPLAYIO_PARAM_BRIGHTNESS:
298 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BRIGHTNESS\n"));
299 return (EINVAL);
300 default:
301 return (EINVAL);
302 }
303 return (0);
304 case WSDISPLAYIO_SETPARAM:
305 dispparam = (struct wsdisplay_param*)data;
306 switch (dispparam->param) {
307 case WSDISPLAYIO_PARAM_BACKLIGHT:
308 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BACKLIGHT\n"));
309 return (EINVAL);
310 case WSDISPLAYIO_PARAM_CONTRAST:
311 DPRINTF(("ipaqlcd_ioctl: GETPARAM:CONTRAST\n"));
312 return (EINVAL);
313 case WSDISPLAYIO_PARAM_BRIGHTNESS:
314 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BRIGHTNESS\n"));
315 return (EINVAL);
316 default:
317 return (EINVAL);
318 }
319 return (0);
320
321 case HPCFBIO_GCONF:
322 fbconf = (struct hpcfb_fbconf *)data;
323 if (fbconf->hf_conf_index != 0 &&
324 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) {
325 return (EINVAL);
326 }
327 *fbconf = sc->sc_fbconf; /* structure assignment */
328 return (0);
329 case HPCFBIO_SCONF:
330 fbconf = (struct hpcfb_fbconf *)data;
331 if (fbconf->hf_conf_index != 0 &&
332 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) {
333 return (EINVAL);
334 }
335 /*
336 * nothing to do because we have only one configuration
337 */
338 return (0);
339 case HPCFBIO_GDSPCONF:
340 dspconf = (struct hpcfb_dspconf *)data;
341 if ((dspconf->hd_unit_index != 0 &&
342 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) ||
343 (dspconf->hd_conf_index != 0 &&
344 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) {
345 return (EINVAL);
346 }
347 *dspconf = sc->sc_dspconf; /* structure assignment */
348 return (0);
349 case HPCFBIO_SDSPCONF:
350 dspconf = (struct hpcfb_dspconf *)data;
351 if ((dspconf->hd_unit_index != 0 &&
352 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) ||
353 (dspconf->hd_conf_index != 0 &&
354 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) {
355 return (EINVAL);
356 }
357 /*
358 * nothing to do
359 * because we have only one unit and one configuration
360 */
361 return (0);
362
363 case HPCFBIO_GOP:
364 case HPCFBIO_SOP:
365 return (EINVAL);
366 }
367 return (EPASSTHROUGH);
368 }
369
370 paddr_t
ipaqlcd_mmap(void * ctx,off_t offset,int prot)371 ipaqlcd_mmap(void *ctx, off_t offset, int prot)
372 {
373 struct ipaqlcd_softc *sc = (struct ipaqlcd_softc *)ctx;
374
375 if (offset < 0 ||
376 (sc->sc_fbconf.hf_bytes_per_plane +
377 sc->sc_fbconf.hf_offset) < offset)
378 return -1;
379
380 return __BTOP((u_long)bootinfo->fb_addr + offset);
381 }
382