1 /* $NetBSD: iocc.h,v 1.2 2008/04/28 20:23:34 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tim Rightnour 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _RS6000_IOCC_H_ 33 #define _RS6000_IOCC_H_ 34 35 /* 36 * Ports and defines used for control of the IOCC 37 */ 38 39 /* MCA register addresses for PPC */ 40 41 #define IOCC_BASE_PPC 0x10000 42 #define IOCC_POSBASE_PPC 0x400000 43 44 #define IOCC_BASE IOCC_BASE_PPC 45 #define IOCC_POSBASE IOCC_POSBASE_PPC 46 47 #define IOCC_CFG_REG (IOCC_BASE + 0x80) /* config reg */ 48 #define IOCC_PERS (IOCC_BASE + 0x88) /* personalization */ 49 #define IOCC_TCE_ADDR_HIGH (IOCC_BASE + 0x98) /* MSW of tceaddr */ 50 #define IOCC_TCE_ADDR_LOW (IOCC_BASE + 0x9C) /* LSW of tceaddr */ 51 #define IOCC_CRESET (IOCC_BASE + 0xA0) /* comp reset reg */ 52 #define IOCC_BUS_MAP (IOCC_BASE + 0xA8) /* bus mapping reg */ 53 #define IOCC_IEE (IOCC_BASE + 0x180) /* intr enable */ 54 #define IOCC_IRR (IOCC_BASE + 0x188) /* intr request reg */ 55 #define IOCC_MIR (IOCC_BASE + 0x190) /* misc intr reg */ 56 #define IOCC_CPU_AVAIL(proc) \ 57 (IOCC_BASE + 0x1C0 + (proc * 4)) /* available procs */ 58 #define IOCC_XIVR(intr) \ 59 (IOCC_BASE + 0x200 + (intr * 4)) /* extr intr vector */ 60 #define IOCC_DMA_SLAVE_CTRL(slave) \ 61 (IOCC_BASE + 0x380 + (slave * 4)) /* slave control regs */ 62 #define IOCC_CHAN_STAT(chan) \ 63 (IOCC_BASE + 0x400 + (chan * 4)) /* channel stat regs */ 64 #define IOCC_EOI(intr) \ 65 (IOCC_BASE + 0x480 + (intr * 4)) /* ext intr vec */ 66 #define IOCC_ARBLEVEL(chan) \ 67 (IOCC_BASE + 0x500 + (chan * 4)) /* chan arb level en/disable */ 68 69 #define MAX_IOCC 2 70 71 #endif /* _RS6000_IOCC_H_ */ 72