xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/intel_gt_irq.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: intel_gt_irq.h,v 1.2 2021/12/18 23:45:30 riastradh Exp $	*/
2 
3 /*
4  * SPDX-License-Identifier: MIT
5  *
6  * Copyright © 2019 Intel Corporation
7  */
8 
9 #ifndef INTEL_GT_IRQ_H
10 #define INTEL_GT_IRQ_H
11 
12 #include <linux/types.h>
13 
14 struct intel_gt;
15 
16 #define GEN8_GT_IRQS (GEN8_GT_RCS_IRQ | \
17 		      GEN8_GT_BCS_IRQ | \
18 		      GEN8_GT_VCS0_IRQ | \
19 		      GEN8_GT_VCS1_IRQ | \
20 		      GEN8_GT_VECS_IRQ | \
21 		      GEN8_GT_PM_IRQ | \
22 		      GEN8_GT_GUC_IRQ)
23 
24 void gen11_gt_irq_reset(struct intel_gt *gt);
25 void gen11_gt_irq_postinstall(struct intel_gt *gt);
26 void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
27 
28 bool gen11_gt_reset_one_iir(struct intel_gt *gt,
29 			    const unsigned int bank,
30 			    const unsigned int bit);
31 
32 void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
33 
34 void gen5_gt_irq_postinstall(struct intel_gt *gt);
35 void gen5_gt_irq_reset(struct intel_gt *gt);
36 void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
37 void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
38 
39 void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
40 
41 void gen8_gt_irq_ack(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
42 void gen8_gt_irq_reset(struct intel_gt *gt);
43 void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
44 void gen8_gt_irq_postinstall(struct intel_gt *gt);
45 
46 #endif /* INTEL_GT_IRQ_H */
47