xref: /plan9/sys/src/9/rb/initreboot.s (revision f43f8ee646e2cb29aea7fd7bb5fc7318a3f4921f)
1/*
2 * mips 24k machine assist for routerboard rb450g (minimal for reboot)
3 */
4#include "mem.h"
5#include "mips.s"
6
7	NOSCHED
8
9TEXT	_main(SB), $0
10	MOVW	$setR30(SB), R30
11	JMP	main(SB)
12
13/* target for JALRHB in BARRIERS */
14TEXT ret(SB), $-4
15	JMP	(R22)
16	NOP
17
18TEXT	setsp(SB), $-4
19	MOVW	R1, SP
20	RETURN
21
22TEXT	coherence(SB), $-4
23	BARRIERS(7, R7, cohhb)
24	SYNC
25	EHB
26	RETURN
27
28/*
29 *  cache manipulation
30 */
31
32/* the i and d caches may be different sizes, so clean them separately */
33TEXT	cleancache(SB), $-4
34	DI(10)				/* intrs off, old status -> R10 */
35	SYNC
36	EHB
37
38	MOVW	R0, R1			/* index, not address */
39	MOVW	$ICACHESIZE, R9
40iccache:
41	CACHE	PI+IWBI, (R1)		/* flush & invalidate I by index */
42	SUBU	$CACHELINESZ, R9
43	ADDU	$CACHELINESZ, R1
44	BGTZ	R9, iccache
45	NOP
46
47	MOVW	R0, R1			/* index, not address */
48	MOVW	$DCACHESIZE, R9
49dccache:
50	CACHE	PD+IWBI, (R1)		/* flush & invalidate D by index */
51	SUBU	$CACHELINESZ, R9
52	ADDU	$CACHELINESZ, R1
53	BGTZ	R9, dccache
54	NOP
55
56	SYNC
57	MOVW	R10, M(STATUS)
58	JRHB(31)			/* return and clear all hazards */
59
60	SCHED
61