1 /* $OpenBSD: if_axe.c,v 1.144 2024/09/04 07:54:52 mglocker Exp $ */ 2 3 /* 4 * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * Copyright (c) 1997, 1998, 1999, 2000-2003 21 * Bill Paul <wpaul@windriver.com>. All rights reserved. 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * 2. Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in the 30 * documentation and/or other materials provided with the distribution. 31 * 3. All advertising materials mentioning features or use of this software 32 * must display the following acknowledgement: 33 * This product includes software developed by Bill Paul. 34 * 4. Neither the name of the author nor the names of any co-contributors 35 * may be used to endorse or promote products derived from this software 36 * without specific prior written permission. 37 * 38 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 39 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 41 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 * THE POSSIBILITY OF SUCH DAMAGE. 49 */ 50 51 /* 52 * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the 53 * LinkSys USB200M and various other adapters. 54 * 55 * Manuals available from: 56 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 57 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 58 * controller) to find the definitions for the RX control register. 59 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 60 * 61 * Written by Bill Paul <wpaul@windriver.com> 62 * Senior Engineer 63 * Wind River Systems 64 */ 65 66 /* 67 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 68 * It uses an external PHY (reference designs use a Realtek chip), 69 * and has a 64-bit multicast hash filter. There is some information 70 * missing from the manual which one needs to know in order to make 71 * the chip function: 72 * 73 * - You must set bit 7 in the RX control register, otherwise the 74 * chip won't receive any packets. 75 * - You must initialize all 3 IPG registers, or you won't be able 76 * to send any packets. 77 * 78 * Note that this device appears to only support loading the station 79 * address via autoload from the EEPROM (i.e. there's no way to manually 80 * set it). 81 * 82 * (Adam Weinberger wanted me to name this driver if_gir.c.) 83 */ 84 85 /* 86 * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck@oz.net> 87 * with bits and pieces from the aue and url drivers. 88 */ 89 90 #include "bpfilter.h" 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/sockio.h> 95 #include <sys/rwlock.h> 96 #include <sys/mbuf.h> 97 98 #include <sys/device.h> 99 100 #include <machine/bus.h> 101 102 #include <net/if.h> 103 #include <net/if_media.h> 104 105 #if NBPFILTER > 0 106 #include <net/bpf.h> 107 #endif 108 109 #include <netinet/in.h> 110 #include <netinet/if_ether.h> 111 112 #include <dev/mii/mii.h> 113 #include <dev/mii/miivar.h> 114 115 #include <dev/usb/usb.h> 116 #include <dev/usb/usbdi.h> 117 #include <dev/usb/usbdi_util.h> 118 #include <dev/usb/usbdivar.h> 119 #include <dev/usb/usbdevs.h> 120 121 #include <dev/usb/if_axereg.h> 122 123 #ifdef AXE_DEBUG 124 #define DPRINTF(x) do { if (axedebug) printf x; } while (0) 125 #define DPRINTFN(n,x) do { if (axedebug >= (n)) printf x; } while (0) 126 int axedebug = 0; 127 #else 128 #define DPRINTF(x) 129 #define DPRINTFN(n,x) 130 #endif 131 132 /* 133 * Various supported device vendors/products. 134 */ 135 const struct axe_type axe_devs[] = { 136 { { USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200}, 0 }, 137 { { USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2}, 0 }, 138 { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET }, AX772 }, 139 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172}, 0 }, 140 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772}, AX772 }, 141 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A}, AX772 }, 142 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B}, AX772 | AX772B }, 143 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B_1}, AX772 | AX772B }, 144 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178}, AX178 }, 145 { { USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T}, 0 }, 146 { { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055 }, AX178 }, 147 { { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR}, 0}, 148 { { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 }, 149 { { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0}, 150 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100}, 0 }, 151 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1 }, AX772 }, 152 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100C1 }, AX772 | AX772B }, 153 { { USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E}, 0 }, 154 { { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2 }, AX178 }, 155 { { USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1}, 0 }, 156 { { USB_VENDOR_LENOVO, USB_PRODUCT_LENOVO_ETHERNET }, AX772 | AX772B }, 157 { { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_HG20F9}, AX772 | AX772B }, 158 { { USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M}, 0 }, 159 { { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000 }, AX178 }, 160 { { USB_VENDOR_LOGITEC, USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 }, 161 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2GT}, AX178 }, 162 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX}, 0 }, 163 { { USB_VENDOR_MSI, USB_PRODUCT_MSI_AX88772A}, AX772 }, 164 { { USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120}, 0 }, 165 { { USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS }, AX772 }, 166 { { USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T }, AX178 }, 167 { { USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 }, 168 { { USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029}, 0 }, 169 { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028 }, AX178 } 170 }; 171 172 #define axe_lookup(v, p) ((struct axe_type *)usb_lookup(axe_devs, v, p)) 173 174 int axe_match(struct device *, void *, void *); 175 void axe_attach(struct device *, struct device *, void *); 176 int axe_detach(struct device *, int); 177 178 struct cfdriver axe_cd = { 179 NULL, "axe", DV_IFNET 180 }; 181 182 const struct cfattach axe_ca = { 183 sizeof(struct axe_softc), axe_match, axe_attach, axe_detach 184 }; 185 186 int axe_tx_list_init(struct axe_softc *); 187 int axe_rx_list_init(struct axe_softc *); 188 struct mbuf *axe_newbuf(void); 189 int axe_encap(struct axe_softc *, struct mbuf *, int); 190 void axe_rxeof(struct usbd_xfer *, void *, usbd_status); 191 void axe_txeof(struct usbd_xfer *, void *, usbd_status); 192 void axe_tick(void *); 193 void axe_tick_task(void *); 194 void axe_start(struct ifnet *); 195 int axe_ioctl(struct ifnet *, u_long, caddr_t); 196 void axe_init(void *); 197 void axe_stop(struct axe_softc *); 198 void axe_watchdog(struct ifnet *); 199 int axe_miibus_readreg(struct device *, int, int); 200 void axe_miibus_writereg(struct device *, int, int, int); 201 void axe_miibus_statchg(struct device *); 202 int axe_cmd(struct axe_softc *, int, int, int, void *); 203 int axe_ifmedia_upd(struct ifnet *); 204 void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 205 void axe_reset(struct axe_softc *sc); 206 207 void axe_iff(struct axe_softc *); 208 void axe_lock_mii(struct axe_softc *sc); 209 void axe_unlock_mii(struct axe_softc *sc); 210 211 void axe_ax88178_init(struct axe_softc *); 212 void axe_ax88772_init(struct axe_softc *); 213 214 /* Get exclusive access to the MII registers */ 215 void 216 axe_lock_mii(struct axe_softc *sc) 217 { 218 sc->axe_refcnt++; 219 rw_enter_write(&sc->axe_mii_lock); 220 } 221 222 void 223 axe_unlock_mii(struct axe_softc *sc) 224 { 225 rw_exit_write(&sc->axe_mii_lock); 226 if (--sc->axe_refcnt < 0) 227 usb_detach_wakeup(&sc->axe_dev); 228 } 229 230 int 231 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 232 { 233 usb_device_request_t req; 234 usbd_status err; 235 236 if (usbd_is_dying(sc->axe_udev)) 237 return(0); 238 239 if (AXE_CMD_DIR(cmd)) 240 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 241 else 242 req.bmRequestType = UT_READ_VENDOR_DEVICE; 243 req.bRequest = AXE_CMD_CMD(cmd); 244 USETW(req.wValue, val); 245 USETW(req.wIndex, index); 246 USETW(req.wLength, AXE_CMD_LEN(cmd)); 247 248 err = usbd_do_request(sc->axe_udev, &req, buf); 249 250 if (err) { 251 DPRINTF(("axe_cmd err: cmd: %d\n", cmd)); 252 return(-1); 253 } 254 255 return(0); 256 } 257 258 int 259 axe_miibus_readreg(struct device *dev, int phy, int reg) 260 { 261 struct axe_softc *sc = (void *)dev; 262 usbd_status err; 263 uWord val; 264 int ival; 265 266 if (usbd_is_dying(sc->axe_udev)) { 267 DPRINTF(("axe: dying\n")); 268 return(0); 269 } 270 271 #ifdef notdef 272 /* 273 * The chip tells us the MII address of any supported 274 * PHYs attached to the chip, so only read from those. 275 */ 276 277 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x\n", phy, reg)); 278 279 if (sc->axe_phyaddrs[0] != AXE_NOPHY && phy != sc->axe_phyaddrs[0]) 280 return (0); 281 282 if (sc->axe_phyaddrs[1] != AXE_NOPHY && phy != sc->axe_phyaddrs[1]) 283 return (0); 284 #endif 285 if (sc->axe_phyno != phy) 286 return (0); 287 288 USETW(val, 0); 289 290 axe_lock_mii(sc); 291 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 292 err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, val); 293 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 294 axe_unlock_mii(sc); 295 296 if (err) { 297 printf("axe%d: read PHY failed\n", sc->axe_unit); 298 return(-1); 299 } 300 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n", 301 phy, reg, UGETW(val))); 302 303 ival = UGETW(val); 304 if ((sc->axe_flags & AX772) != 0 && reg == MII_BMSR) { 305 /* 306 * BMSR of AX88772 indicates that it supports extended 307 * capability but the extended status register is 308 * reserved for embedded ethernet PHY. So clear the 309 * extended capability bit of BMSR. 310 */ 311 ival &= ~BMSR_EXTCAP; 312 } 313 314 return (ival); 315 } 316 317 void 318 axe_miibus_writereg(struct device *dev, int phy, int reg, int val) 319 { 320 struct axe_softc *sc = (void *)dev; 321 usbd_status err; 322 uWord uval; 323 324 if (usbd_is_dying(sc->axe_udev)) 325 return; 326 if (sc->axe_phyno != phy) 327 return; 328 329 USETW(uval, val); 330 331 axe_lock_mii(sc); 332 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 333 err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, uval); 334 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 335 axe_unlock_mii(sc); 336 337 if (err) { 338 printf("axe%d: write PHY failed\n", sc->axe_unit); 339 return; 340 } 341 } 342 343 void 344 axe_miibus_statchg(struct device *dev) 345 { 346 struct axe_softc *sc = (void *)dev; 347 struct mii_data *mii = GET_MII(sc); 348 struct ifnet *ifp; 349 int val, err; 350 351 ifp = GET_IFP(sc); 352 if (mii == NULL || ifp == NULL || 353 (ifp->if_flags & IFF_RUNNING) == 0) 354 return; 355 356 sc->axe_link = 0; 357 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 358 (IFM_ACTIVE | IFM_AVALID)) { 359 switch (IFM_SUBTYPE(mii->mii_media_active)) { 360 case IFM_10_T: 361 case IFM_100_TX: 362 sc->axe_link++; 363 break; 364 case IFM_1000_T: 365 if ((sc->axe_flags & AX178) == 0) 366 break; 367 sc->axe_link++; 368 break; 369 default: 370 break; 371 } 372 } 373 374 /* Lost link, do nothing. */ 375 if (sc->axe_link == 0) 376 return; 377 378 val = 0; 379 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 380 val |= AXE_MEDIA_FULL_DUPLEX; 381 382 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 383 val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC); 384 if (sc->axe_flags & AX178) 385 val |= AXE_178_MEDIA_ENCK; 386 387 switch (IFM_SUBTYPE(mii->mii_media_active)) { 388 case IFM_1000_T: 389 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 390 break; 391 case IFM_100_TX: 392 val |= AXE_178_MEDIA_100TX; 393 break; 394 case IFM_10_T: 395 /* doesn't need to be handled */ 396 break; 397 } 398 } 399 400 DPRINTF(("axe_miibus_statchg: val=0x%x\n", val)); 401 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 402 if (err) { 403 printf("%s: media change failed\n", sc->axe_dev.dv_xname); 404 return; 405 } 406 } 407 408 /* 409 * Set media options. 410 */ 411 int 412 axe_ifmedia_upd(struct ifnet *ifp) 413 { 414 struct axe_softc *sc = ifp->if_softc; 415 struct mii_data *mii = GET_MII(sc); 416 417 if (mii->mii_instance) { 418 struct mii_softc *miisc; 419 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 420 mii_phy_reset(miisc); 421 } 422 mii_mediachg(mii); 423 424 return (0); 425 } 426 427 /* 428 * Report current media status. 429 */ 430 void 431 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 432 { 433 struct axe_softc *sc = ifp->if_softc; 434 struct mii_data *mii = GET_MII(sc); 435 436 mii_pollstat(mii); 437 ifmr->ifm_active = mii->mii_media_active; 438 ifmr->ifm_status = mii->mii_media_status; 439 } 440 441 void 442 axe_iff(struct axe_softc *sc) 443 { 444 struct ifnet *ifp = GET_IFP(sc); 445 struct arpcom *ac = &sc->arpcom; 446 struct ether_multi *enm; 447 struct ether_multistep step; 448 u_int32_t h = 0; 449 uWord urxmode; 450 u_int16_t rxmode; 451 u_int8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 452 453 if (usbd_is_dying(sc->axe_udev)) 454 return; 455 456 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode); 457 rxmode = UGETW(urxmode); 458 rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_MULTICAST | 459 AXE_RXCMD_PROMISC); 460 ifp->if_flags &= ~IFF_ALLMULTI; 461 462 /* 463 * Always accept broadcast frames. 464 * Always accept frames destined to our station address. 465 */ 466 rxmode |= AXE_RXCMD_BROADCAST; 467 if ((sc->axe_flags & (AX178 | AX772)) == 0) 468 rxmode |= AXE_172_RXCMD_UNICAST; 469 470 if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) { 471 ifp->if_flags |= IFF_ALLMULTI; 472 rxmode |= AXE_RXCMD_ALLMULTI; 473 if (ifp->if_flags & IFF_PROMISC) 474 rxmode |= AXE_RXCMD_PROMISC; 475 } else { 476 rxmode |= AXE_RXCMD_MULTICAST; 477 478 /* now program new ones */ 479 ETHER_FIRST_MULTI(step, ac, enm); 480 while (enm != NULL) { 481 h = ether_crc32_be(enm->enm_addrlo, 482 ETHER_ADDR_LEN) >> 26; 483 484 hashtbl[h / 8] |= 1 << (h % 8); 485 486 ETHER_NEXT_MULTI(step, enm); 487 } 488 } 489 490 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 491 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 492 } 493 494 void 495 axe_reset(struct axe_softc *sc) 496 { 497 if (usbd_is_dying(sc->axe_udev)) 498 return; 499 /* XXX What to reset? */ 500 501 /* Wait a little while for the chip to get its brains in order. */ 502 DELAY(1000); 503 return; 504 } 505 506 #define AXE_GPIO_WRITE(x,y) do { \ 507 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 508 usbd_delay_ms(sc->axe_udev, (y)); \ 509 } while (0) 510 511 void 512 axe_ax88178_init(struct axe_softc *sc) 513 { 514 int gpio0 = 0, phymode = 0, ledmode; 515 u_int16_t eeprom, val; 516 517 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 518 /* XXX magic */ 519 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 520 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 521 522 eeprom = letoh16(eeprom); 523 524 DPRINTF((" EEPROM is 0x%x\n", eeprom)); 525 526 /* if EEPROM is invalid we have to use to GPIO0 */ 527 if (eeprom == 0xffff) { 528 phymode = AXE_PHY_MODE_MARVELL; 529 gpio0 = 1; 530 ledmode = 0; 531 } else { 532 phymode = eeprom & 0x7f; 533 gpio0 = (eeprom & 0x80) ? 0 : 1; 534 ledmode = eeprom >> 8; 535 } 536 537 DPRINTF(("use gpio0: %d, phymode 0x%02x, eeprom 0x%04x\n", 538 gpio0, phymode, eeprom)); 539 540 /* power up external phy */ 541 AXE_GPIO_WRITE(AXE_GPIO1|AXE_GPIO1_EN | AXE_GPIO_RELOAD_EEPROM, 40); 542 if (ledmode == 1) { 543 AXE_GPIO_WRITE(AXE_GPIO1_EN, 30); 544 AXE_GPIO_WRITE(AXE_GPIO1_EN | AXE_GPIO1, 30); 545 } else { 546 val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 547 AXE_GPIO1 | AXE_GPIO1_EN; 548 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, 30); 549 AXE_GPIO_WRITE(val | AXE_GPIO2_EN, 300); 550 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, 30); 551 } 552 553 /* initialize phy */ 554 if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 555 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x1f, 0x0005); 556 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x0c, 0x0000); 557 val = axe_miibus_readreg(&sc->axe_dev, sc->axe_phyno, 0x0001); 558 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x01, 559 val | 0x0080); 560 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x1f, 0x0000); 561 } 562 563 /* soft reset */ 564 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 565 usbd_delay_ms(sc->axe_udev, 150); 566 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 567 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 568 usbd_delay_ms(sc->axe_udev, 150); 569 /* Enable MII/GMII/RGMII for external PHY */ 570 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 571 usbd_delay_ms(sc->axe_udev, 10); 572 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 573 } 574 575 /* Read Ethernet Address from EEPROM if it is zero */ 576 void 577 axe_ax88772b_nodeid(struct axe_softc *sc, u_char *eaddr) 578 { 579 int i; 580 uint16_t val; 581 582 for (i = 0; i < ETHER_ADDR_LEN; i++) { 583 if (eaddr[i] != 0) 584 break; 585 } 586 587 /* We already have an ethernet address */ 588 if (i != ETHER_ADDR_LEN) 589 return; 590 591 /* read from EEPROM */ 592 for (i = 0; i < ETHER_ADDR_LEN/2; i++) { 593 axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_NODEID + i, &val); 594 val = ntohs(val); 595 *eaddr++ = (u_char)((val >> 8) & 0xff); 596 *eaddr++ = (u_char)(val & 0xff); 597 } 598 } 599 600 void 601 axe_ax88772_init(struct axe_softc *sc) 602 { 603 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 604 usbd_delay_ms(sc->axe_udev, 40); 605 606 if (sc->axe_phyno == AXE_PHY_NO_AX772_EPHY) { 607 /* ask for the embedded PHY */ 608 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 609 usbd_delay_ms(sc->axe_udev, 10); 610 611 /* power down and reset state, pin reset state */ 612 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 613 usbd_delay_ms(sc->axe_udev, 60); 614 615 /* power down/reset state, pin operating state */ 616 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 617 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 618 usbd_delay_ms(sc->axe_udev, 150); 619 620 /* power up, reset */ 621 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 622 623 /* power up, operating */ 624 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 625 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 626 } else { 627 /* ask for external PHY */ 628 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 629 usbd_delay_ms(sc->axe_udev, 10); 630 631 /* power down internal PHY */ 632 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 633 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 634 } 635 636 usbd_delay_ms(sc->axe_udev, 150); 637 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 638 } 639 640 static int 641 axe_get_phyno(struct axe_softc *sc, int sel) 642 { 643 int phyno = -1; 644 645 switch (AXE_PHY_TYPE(sc->axe_phyaddrs[sel])) { 646 case PHY_TYPE_100_HOME: 647 case PHY_TYPE_GIG: 648 phyno = AXE_PHY_NO(sc->axe_phyaddrs[sel]); 649 break; 650 case PHY_TYPE_SPECIAL: 651 /* FALLTHROUGH */ 652 case PHY_TYPE_RSVD: 653 /* FALLTHROUGH */ 654 case PHY_TYPE_NON_SUP: 655 /* FALLTHROUGH */ 656 default: 657 break; 658 } 659 660 return (phyno); 661 } 662 663 /* 664 * Probe for a AX88172 chip. 665 */ 666 int 667 axe_match(struct device *parent, void *match, void *aux) 668 { 669 struct usb_attach_arg *uaa = aux; 670 671 if (uaa->iface == NULL || uaa->configno != 1) 672 return (UMATCH_NONE); 673 674 return (axe_lookup(uaa->vendor, uaa->product) != NULL ? 675 UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE); 676 } 677 678 /* 679 * Attach the interface. Allocate softc structures, do ifmedia 680 * setup and ethernet/BPF attach. 681 */ 682 void 683 axe_attach(struct device *parent, struct device *self, void *aux) 684 { 685 struct axe_softc *sc = (struct axe_softc *)self; 686 struct usb_attach_arg *uaa = aux; 687 usb_interface_descriptor_t *id; 688 usb_endpoint_descriptor_t *ed; 689 struct mii_data *mii; 690 u_char eaddr[ETHER_ADDR_LEN]; 691 char *devname = sc->axe_dev.dv_xname; 692 struct ifnet *ifp; 693 int i, s; 694 695 sc->axe_unit = self->dv_unit; /*device_get_unit(self);*/ 696 sc->axe_udev = uaa->device; 697 sc->axe_iface = uaa->iface; 698 sc->axe_flags = axe_lookup(uaa->vendor, uaa->product)->axe_flags; 699 700 usb_init_task(&sc->axe_tick_task, axe_tick_task, sc, 701 USB_TASK_TYPE_GENERIC); 702 rw_init(&sc->axe_mii_lock, "axemii"); 703 usb_init_task(&sc->axe_stop_task, (void (*)(void *))axe_stop, sc, 704 USB_TASK_TYPE_GENERIC); 705 706 sc->axe_product = uaa->product; 707 sc->axe_vendor = uaa->vendor; 708 709 id = usbd_get_interface_descriptor(sc->axe_iface); 710 711 /* decide on what our bufsize will be */ 712 if (sc->axe_flags & (AX178 | AX772)) 713 sc->axe_bufsz = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 714 AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ; 715 else 716 sc->axe_bufsz = AXE_172_BUFSZ; 717 718 /* Find endpoints. */ 719 for (i = 0; i < id->bNumEndpoints; i++) { 720 ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i); 721 if (!ed) { 722 printf("%s: couldn't get ep %d\n", 723 sc->axe_dev.dv_xname, i); 724 return; 725 } 726 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 727 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 728 sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress; 729 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 730 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 731 sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress; 732 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 733 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 734 sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress; 735 } 736 } 737 738 s = splnet(); 739 740 /* We need the PHYID for init dance in some cases */ 741 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs); 742 743 DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n", 744 sc->axe_phyaddrs[0], sc->axe_phyaddrs[1])); 745 746 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 747 if (sc->axe_phyno == -1) 748 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 749 if (sc->axe_phyno == -1) { 750 printf("%s:", sc->axe_dev.dv_xname); 751 printf(" no valid PHY address found, assuming PHY address 0\n"); 752 sc->axe_phyno = 0; 753 } 754 755 DPRINTF((" get_phyno %d\n", sc->axe_phyno)); 756 757 if (sc->axe_flags & AX178) 758 axe_ax88178_init(sc); 759 else if (sc->axe_flags & AX772) 760 axe_ax88772_init(sc); 761 762 /* 763 * Get station address. 764 */ 765 if (sc->axe_flags & (AX178 | AX772)) 766 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr); 767 else 768 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr); 769 770 if (sc->axe_flags & AX772B) 771 axe_ax88772b_nodeid(sc, eaddr); 772 773 /* 774 * Load IPG values 775 */ 776 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs); 777 778 /* 779 * An ASIX chip was detected. Inform the world. 780 */ 781 printf("%s:", sc->axe_dev.dv_xname); 782 if (sc->axe_flags & AX178) 783 printf(" AX88178"); 784 else if (sc->axe_flags & AX772B) 785 printf(" AX88772B"); 786 else if (sc->axe_flags & AX772) 787 printf(" AX88772"); 788 else 789 printf(" AX88172"); 790 printf(", address %s\n", ether_sprintf(eaddr)); 791 792 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 793 794 /* Initialize interface info.*/ 795 ifp = &sc->arpcom.ac_if; 796 ifp->if_softc = sc; 797 strlcpy(ifp->if_xname, devname, IFNAMSIZ); 798 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 799 ifp->if_ioctl = axe_ioctl; 800 ifp->if_start = axe_start; 801 ifp->if_watchdog = axe_watchdog; 802 803 ifp->if_capabilities = IFCAP_VLAN_MTU; 804 805 /* Initialize MII/media info. */ 806 mii = &sc->axe_mii; 807 mii->mii_ifp = ifp; 808 mii->mii_readreg = axe_miibus_readreg; 809 mii->mii_writereg = axe_miibus_writereg; 810 mii->mii_statchg = axe_miibus_statchg; 811 mii->mii_flags = MIIF_AUTOTSLEEP; 812 813 ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd, axe_ifmedia_sts); 814 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 815 816 if (LIST_FIRST(&mii->mii_phys) == NULL) { 817 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL); 818 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE); 819 } else 820 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 821 822 /* Attach the interface. */ 823 if_attach(ifp); 824 ether_ifattach(ifp); 825 826 timeout_set(&sc->axe_stat_ch, axe_tick, sc); 827 828 splx(s); 829 } 830 831 int 832 axe_detach(struct device *self, int flags) 833 { 834 struct axe_softc *sc = (struct axe_softc *)self; 835 int s; 836 struct ifnet *ifp = GET_IFP(sc); 837 838 DPRINTFN(2,("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 839 840 if (timeout_initialized(&sc->axe_stat_ch)) 841 timeout_del(&sc->axe_stat_ch); 842 843 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) 844 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]); 845 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) 846 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]); 847 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) 848 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 849 850 /* 851 * Remove any pending tasks. They cannot be executing because they run 852 * in the same thread as detach. 853 */ 854 usb_rem_task(sc->axe_udev, &sc->axe_tick_task); 855 usb_rem_task(sc->axe_udev, &sc->axe_stop_task); 856 857 s = splusb(); 858 859 if (--sc->axe_refcnt >= 0) { 860 /* Wait for processes to go away */ 861 usb_detach_wait(&sc->axe_dev); 862 } 863 864 if (ifp->if_flags & IFF_RUNNING) 865 axe_stop(sc); 866 867 mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY); 868 ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY); 869 if (ifp->if_softc != NULL) { 870 ether_ifdetach(ifp); 871 if_detach(ifp); 872 } 873 874 #ifdef DIAGNOSTIC 875 if (sc->axe_ep[AXE_ENDPT_TX] != NULL || 876 sc->axe_ep[AXE_ENDPT_RX] != NULL || 877 sc->axe_ep[AXE_ENDPT_INTR] != NULL) 878 printf("%s: detach has active endpoints\n", 879 sc->axe_dev.dv_xname); 880 #endif 881 882 splx(s); 883 884 return (0); 885 } 886 887 struct mbuf * 888 axe_newbuf(void) 889 { 890 struct mbuf *m; 891 892 MGETHDR(m, M_DONTWAIT, MT_DATA); 893 if (m == NULL) 894 return (NULL); 895 896 MCLGET(m, M_DONTWAIT); 897 if (!(m->m_flags & M_EXT)) { 898 m_freem(m); 899 return (NULL); 900 } 901 902 m->m_len = m->m_pkthdr.len = MCLBYTES; 903 m_adj(m, ETHER_ALIGN); 904 905 return (m); 906 } 907 908 int 909 axe_rx_list_init(struct axe_softc *sc) 910 { 911 struct axe_cdata *cd; 912 struct axe_chain *c; 913 int i; 914 915 DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 916 917 cd = &sc->axe_cdata; 918 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 919 c = &cd->axe_rx_chain[i]; 920 c->axe_sc = sc; 921 c->axe_idx = i; 922 c->axe_mbuf = NULL; 923 if (c->axe_xfer == NULL) { 924 c->axe_xfer = usbd_alloc_xfer(sc->axe_udev); 925 if (c->axe_xfer == NULL) 926 return (ENOBUFS); 927 c->axe_buf = usbd_alloc_buffer(c->axe_xfer, 928 sc->axe_bufsz); 929 if (c->axe_buf == NULL) { 930 usbd_free_xfer(c->axe_xfer); 931 return (ENOBUFS); 932 } 933 } 934 } 935 936 return (0); 937 } 938 939 int 940 axe_tx_list_init(struct axe_softc *sc) 941 { 942 struct axe_cdata *cd; 943 struct axe_chain *c; 944 int i; 945 946 DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 947 948 cd = &sc->axe_cdata; 949 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 950 c = &cd->axe_tx_chain[i]; 951 c->axe_sc = sc; 952 c->axe_idx = i; 953 c->axe_mbuf = NULL; 954 if (c->axe_xfer == NULL) { 955 c->axe_xfer = usbd_alloc_xfer(sc->axe_udev); 956 if (c->axe_xfer == NULL) 957 return (ENOBUFS); 958 c->axe_buf = usbd_alloc_buffer(c->axe_xfer, 959 sc->axe_bufsz); 960 if (c->axe_buf == NULL) { 961 usbd_free_xfer(c->axe_xfer); 962 return (ENOBUFS); 963 } 964 } 965 } 966 967 return (0); 968 } 969 970 /* 971 * A frame has been uploaded: pass the resulting mbuf chain up to 972 * the higher level protocols. 973 */ 974 void 975 axe_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 976 { 977 struct axe_chain *c = (struct axe_chain *)priv; 978 struct axe_softc *sc = c->axe_sc; 979 struct ifnet *ifp = GET_IFP(sc); 980 struct mbuf_list ml = MBUF_LIST_INITIALIZER(); 981 u_char *buf = c->axe_buf; 982 u_int32_t total_len; 983 u_int16_t pktlen = 0; 984 struct mbuf *m; 985 struct axe_sframe_hdr hdr; 986 int s; 987 988 DPRINTFN(10,("%s: %s: enter\n", sc->axe_dev.dv_xname,__func__)); 989 990 if (usbd_is_dying(sc->axe_udev)) 991 return; 992 993 if (!(ifp->if_flags & IFF_RUNNING)) 994 return; 995 996 if (status != USBD_NORMAL_COMPLETION) { 997 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 998 return; 999 if (usbd_ratecheck(&sc->axe_rx_notice)) { 1000 printf("%s: usb errors on rx: %s\n", 1001 sc->axe_dev.dv_xname, usbd_errstr(status)); 1002 } 1003 if (status == USBD_STALLED) 1004 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]); 1005 goto done; 1006 } 1007 1008 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL); 1009 1010 do { 1011 if (sc->axe_flags & (AX178 | AX772)) { 1012 if (total_len < sizeof(hdr)) { 1013 ifp->if_ierrors++; 1014 goto done; 1015 } 1016 1017 buf += pktlen; 1018 1019 memcpy(&hdr, buf, sizeof(hdr)); 1020 total_len -= sizeof(hdr); 1021 1022 if (((letoh16(hdr.len) & AXE_RH1M_RXLEN_MASK) ^ 1023 (letoh16(hdr.ilen) & AXE_RH1M_RXLEN_MASK)) != 1024 AXE_RH1M_RXLEN_MASK) { 1025 ifp->if_ierrors++; 1026 goto done; 1027 } 1028 pktlen = letoh16(hdr.len) & AXE_RH1M_RXLEN_MASK; 1029 if (pktlen > total_len) { 1030 ifp->if_ierrors++; 1031 goto done; 1032 } 1033 1034 buf += sizeof(hdr); 1035 1036 if ((pktlen % 2) != 0) 1037 pktlen++; 1038 1039 if (total_len < pktlen) 1040 total_len = 0; 1041 else 1042 total_len -= pktlen; 1043 } else { 1044 pktlen = total_len; /* crc on the end? */ 1045 total_len = 0; 1046 } 1047 1048 m = axe_newbuf(); 1049 if (m == NULL) { 1050 ifp->if_ierrors++; 1051 goto done; 1052 } 1053 1054 m->m_pkthdr.len = m->m_len = pktlen; 1055 1056 memcpy(mtod(m, char *), buf, pktlen); 1057 1058 ml_enqueue(&ml, m); 1059 1060 } while (total_len > 0); 1061 1062 done: 1063 /* push the packet up */ 1064 s = splnet(); 1065 if_input(ifp, &ml); 1066 splx(s); 1067 1068 memset(c->axe_buf, 0, sc->axe_bufsz); 1069 1070 /* Setup new transfer. */ 1071 usbd_setup_xfer(xfer, sc->axe_ep[AXE_ENDPT_RX], 1072 c, c->axe_buf, sc->axe_bufsz, 1073 USBD_SHORT_XFER_OK | USBD_NO_COPY, 1074 USBD_NO_TIMEOUT, axe_rxeof); 1075 usbd_transfer(xfer); 1076 1077 DPRINTFN(10,("%s: %s: start rx\n", sc->axe_dev.dv_xname, __func__)); 1078 1079 return; 1080 } 1081 1082 /* 1083 * A frame was downloaded to the chip. It's safe for us to clean up 1084 * the list buffers. 1085 */ 1086 1087 void 1088 axe_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1089 { 1090 struct axe_softc *sc; 1091 struct axe_chain *c; 1092 struct ifnet *ifp; 1093 int s; 1094 1095 c = priv; 1096 sc = c->axe_sc; 1097 ifp = &sc->arpcom.ac_if; 1098 1099 if (usbd_is_dying(sc->axe_udev)) 1100 return; 1101 1102 s = splnet(); 1103 1104 if (status != USBD_NORMAL_COMPLETION) { 1105 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) { 1106 splx(s); 1107 return; 1108 } 1109 ifp->if_oerrors++; 1110 printf("axe%d: usb error on tx: %s\n", sc->axe_unit, 1111 usbd_errstr(status)); 1112 if (status == USBD_STALLED) 1113 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]); 1114 splx(s); 1115 return; 1116 } 1117 1118 ifp->if_timer = 0; 1119 ifq_clr_oactive(&ifp->if_snd); 1120 1121 m_freem(c->axe_mbuf); 1122 c->axe_mbuf = NULL; 1123 1124 if (ifq_empty(&ifp->if_snd) == 0) 1125 axe_start(ifp); 1126 1127 splx(s); 1128 return; 1129 } 1130 1131 void 1132 axe_tick(void *xsc) 1133 { 1134 struct axe_softc *sc = xsc; 1135 1136 if (sc == NULL) 1137 return; 1138 1139 DPRINTFN(0xff, ("%s: %s: enter\n", sc->axe_dev.dv_xname, 1140 __func__)); 1141 1142 if (usbd_is_dying(sc->axe_udev)) 1143 return; 1144 1145 /* Perform periodic stuff in process context */ 1146 usb_add_task(sc->axe_udev, &sc->axe_tick_task); 1147 1148 } 1149 1150 void 1151 axe_tick_task(void *xsc) 1152 { 1153 int s; 1154 struct axe_softc *sc; 1155 struct ifnet *ifp; 1156 struct mii_data *mii; 1157 1158 sc = xsc; 1159 1160 if (sc == NULL) 1161 return; 1162 1163 if (usbd_is_dying(sc->axe_udev)) 1164 return; 1165 1166 ifp = GET_IFP(sc); 1167 mii = GET_MII(sc); 1168 if (mii == NULL) 1169 return; 1170 1171 s = splnet(); 1172 1173 mii_tick(mii); 1174 if (sc->axe_link == 0) 1175 axe_miibus_statchg(&sc->axe_dev); 1176 timeout_add_sec(&sc->axe_stat_ch, 1); 1177 1178 splx(s); 1179 } 1180 1181 int 1182 axe_encap(struct axe_softc *sc, struct mbuf *m, int idx) 1183 { 1184 struct axe_chain *c; 1185 usbd_status err; 1186 struct axe_sframe_hdr hdr; 1187 int length, boundary; 1188 1189 c = &sc->axe_cdata.axe_tx_chain[idx]; 1190 1191 if (sc->axe_flags & (AX178 | AX772)) { 1192 boundary = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 512 : 64; 1193 1194 hdr.len = htole16(m->m_pkthdr.len); 1195 hdr.ilen = ~hdr.len; 1196 1197 memcpy(c->axe_buf, &hdr, sizeof(hdr)); 1198 length = sizeof(hdr); 1199 1200 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length); 1201 length += m->m_pkthdr.len; 1202 1203 if ((length % boundary) == 0) { 1204 hdr.len = 0x0000; 1205 hdr.ilen = 0xffff; 1206 memcpy(c->axe_buf + length, &hdr, sizeof(hdr)); 1207 length += sizeof(hdr); 1208 } 1209 1210 } else { 1211 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf); 1212 length = m->m_pkthdr.len; 1213 } 1214 1215 c->axe_mbuf = m; 1216 1217 usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_TX], 1218 c, c->axe_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 1219 10000, axe_txeof); 1220 1221 /* Transmit */ 1222 err = usbd_transfer(c->axe_xfer); 1223 if (err != USBD_IN_PROGRESS) { 1224 c->axe_mbuf = NULL; 1225 axe_stop(sc); 1226 return(EIO); 1227 } 1228 1229 sc->axe_cdata.axe_tx_cnt++; 1230 1231 return(0); 1232 } 1233 1234 void 1235 axe_start(struct ifnet *ifp) 1236 { 1237 struct axe_softc *sc; 1238 struct mbuf *m_head = NULL; 1239 1240 sc = ifp->if_softc; 1241 1242 if (!sc->axe_link) 1243 return; 1244 1245 if (ifq_is_oactive(&ifp->if_snd)) 1246 return; 1247 1248 m_head = ifq_dequeue(&ifp->if_snd); 1249 if (m_head == NULL) 1250 return; 1251 1252 if (axe_encap(sc, m_head, 0)) { 1253 m_freem(m_head); 1254 ifq_set_oactive(&ifp->if_snd); 1255 return; 1256 } 1257 1258 /* 1259 * If there's a BPF listener, bounce a copy of this frame 1260 * to him. 1261 */ 1262 #if NBPFILTER > 0 1263 if (ifp->if_bpf) 1264 bpf_mtap(ifp->if_bpf, m_head, BPF_DIRECTION_OUT); 1265 #endif 1266 1267 ifq_set_oactive(&ifp->if_snd); 1268 1269 /* 1270 * Set a timeout in case the chip goes out to lunch. 1271 */ 1272 ifp->if_timer = 5; 1273 1274 return; 1275 } 1276 1277 void 1278 axe_init(void *xsc) 1279 { 1280 struct axe_softc *sc = xsc; 1281 struct ifnet *ifp = &sc->arpcom.ac_if; 1282 struct axe_chain *c; 1283 usbd_status err; 1284 uWord urxmode; 1285 int rxmode; 1286 int i, s; 1287 1288 s = splnet(); 1289 1290 /* 1291 * Cancel pending I/O and free all RX/TX buffers. 1292 */ 1293 axe_reset(sc); 1294 1295 /* set MAC address */ 1296 if (sc->axe_flags & (AX178 | AX772)) 1297 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, 1298 &sc->arpcom.ac_enaddr); 1299 1300 /* Enable RX logic. */ 1301 1302 /* Init RX ring. */ 1303 if (axe_rx_list_init(sc) == ENOBUFS) { 1304 printf("axe%d: rx list init failed\n", sc->axe_unit); 1305 splx(s); 1306 return; 1307 } 1308 1309 /* Init TX ring. */ 1310 if (axe_tx_list_init(sc) == ENOBUFS) { 1311 printf("axe%d: tx list init failed\n", sc->axe_unit); 1312 splx(s); 1313 return; 1314 } 1315 1316 /* Set transmitter IPG values */ 1317 if (sc->axe_flags & (AX178 | AX772)) 1318 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2], 1319 (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL); 1320 else { 1321 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL); 1322 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL); 1323 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL); 1324 } 1325 1326 /* Program promiscuous mode and multicast filters. */ 1327 axe_iff(sc); 1328 1329 /* Enable receiver, set RX mode */ 1330 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode); 1331 rxmode = UGETW(urxmode); 1332 rxmode |= AXE_RXCMD_ENABLE; 1333 if (sc->axe_flags & AX772B) 1334 rxmode |= AXE_772B_RXCMD_RH1M; 1335 else if (sc->axe_flags & (AX178 | AX772)) { 1336 if (sc->axe_udev->speed == USB_SPEED_HIGH) { 1337 /* largest possible USB buffer size for AX88178 */ 1338 rxmode |= AXE_178_RXCMD_MFB; 1339 } 1340 } 1341 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1342 1343 /* Open RX and TX pipes. */ 1344 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX], 1345 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]); 1346 if (err) { 1347 printf("axe%d: open rx pipe failed: %s\n", 1348 sc->axe_unit, usbd_errstr(err)); 1349 splx(s); 1350 return; 1351 } 1352 1353 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX], 1354 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]); 1355 if (err) { 1356 printf("axe%d: open tx pipe failed: %s\n", 1357 sc->axe_unit, usbd_errstr(err)); 1358 splx(s); 1359 return; 1360 } 1361 1362 /* Start up the receive pipe. */ 1363 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1364 c = &sc->axe_cdata.axe_rx_chain[i]; 1365 usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_RX], 1366 c, c->axe_buf, sc->axe_bufsz, 1367 USBD_SHORT_XFER_OK | USBD_NO_COPY, 1368 USBD_NO_TIMEOUT, axe_rxeof); 1369 usbd_transfer(c->axe_xfer); 1370 } 1371 1372 sc->axe_link = 0; 1373 ifp->if_flags |= IFF_RUNNING; 1374 ifq_clr_oactive(&ifp->if_snd); 1375 1376 splx(s); 1377 1378 timeout_add_sec(&sc->axe_stat_ch, 1); 1379 return; 1380 } 1381 1382 int 1383 axe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1384 { 1385 struct axe_softc *sc = ifp->if_softc; 1386 struct ifreq *ifr = (struct ifreq *)data; 1387 int s, error = 0; 1388 1389 s = splnet(); 1390 1391 switch(cmd) { 1392 case SIOCSIFADDR: 1393 ifp->if_flags |= IFF_UP; 1394 if (!(ifp->if_flags & IFF_RUNNING)) 1395 axe_init(sc); 1396 break; 1397 1398 case SIOCSIFFLAGS: 1399 if (ifp->if_flags & IFF_UP) { 1400 if (ifp->if_flags & IFF_RUNNING) 1401 error = ENETRESET; 1402 else 1403 axe_init(sc); 1404 } else { 1405 if (ifp->if_flags & IFF_RUNNING) 1406 axe_stop(sc); 1407 } 1408 break; 1409 1410 case SIOCGIFMEDIA: 1411 case SIOCSIFMEDIA: 1412 error = ifmedia_ioctl(ifp, ifr, &sc->axe_mii.mii_media, cmd); 1413 break; 1414 1415 default: 1416 error = ether_ioctl(ifp, &sc->arpcom, cmd, data); 1417 } 1418 1419 if (error == ENETRESET) { 1420 if (ifp->if_flags & IFF_RUNNING) 1421 axe_iff(sc); 1422 error = 0; 1423 } 1424 1425 splx(s); 1426 return(error); 1427 } 1428 1429 void 1430 axe_watchdog(struct ifnet *ifp) 1431 { 1432 struct axe_softc *sc; 1433 struct axe_chain *c; 1434 usbd_status stat; 1435 int s; 1436 1437 sc = ifp->if_softc; 1438 1439 ifp->if_oerrors++; 1440 printf("axe%d: watchdog timeout\n", sc->axe_unit); 1441 1442 s = splusb(); 1443 c = &sc->axe_cdata.axe_tx_chain[0]; 1444 usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat); 1445 axe_txeof(c->axe_xfer, c, stat); 1446 1447 if (!ifq_empty(&ifp->if_snd)) 1448 axe_start(ifp); 1449 splx(s); 1450 } 1451 1452 /* 1453 * Stop the adapter and free any mbufs allocated to the 1454 * RX and TX lists. 1455 */ 1456 void 1457 axe_stop(struct axe_softc *sc) 1458 { 1459 usbd_status err; 1460 struct ifnet *ifp; 1461 int i; 1462 1463 axe_reset(sc); 1464 1465 ifp = &sc->arpcom.ac_if; 1466 ifp->if_timer = 0; 1467 ifp->if_flags &= ~IFF_RUNNING; 1468 ifq_clr_oactive(&ifp->if_snd); 1469 1470 timeout_del(&sc->axe_stat_ch); 1471 1472 /* Stop transfers. */ 1473 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) { 1474 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1475 if (err) { 1476 printf("axe%d: close rx pipe failed: %s\n", 1477 sc->axe_unit, usbd_errstr(err)); 1478 } 1479 sc->axe_ep[AXE_ENDPT_RX] = NULL; 1480 } 1481 1482 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) { 1483 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1484 if (err) { 1485 printf("axe%d: close tx pipe failed: %s\n", 1486 sc->axe_unit, usbd_errstr(err)); 1487 } 1488 sc->axe_ep[AXE_ENDPT_TX] = NULL; 1489 } 1490 1491 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) { 1492 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1493 if (err) { 1494 printf("axe%d: close intr pipe failed: %s\n", 1495 sc->axe_unit, usbd_errstr(err)); 1496 } 1497 sc->axe_ep[AXE_ENDPT_INTR] = NULL; 1498 } 1499 1500 /* Free RX resources. */ 1501 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1502 if (sc->axe_cdata.axe_rx_chain[i].axe_mbuf != NULL) { 1503 m_freem(sc->axe_cdata.axe_rx_chain[i].axe_mbuf); 1504 sc->axe_cdata.axe_rx_chain[i].axe_mbuf = NULL; 1505 } 1506 if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) { 1507 usbd_free_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer); 1508 sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL; 1509 } 1510 } 1511 1512 /* Free TX resources. */ 1513 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 1514 if (sc->axe_cdata.axe_tx_chain[i].axe_mbuf != NULL) { 1515 m_freem(sc->axe_cdata.axe_tx_chain[i].axe_mbuf); 1516 sc->axe_cdata.axe_tx_chain[i].axe_mbuf = NULL; 1517 } 1518 if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) { 1519 usbd_free_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer); 1520 sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL; 1521 } 1522 } 1523 1524 sc->axe_link = 0; 1525 } 1526 1527