1 /* $NetBSD: if_admswvar.h,v 1.9 2022/09/29 07:00:46 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or 8 * without modification, are permitted provided that the following 9 * conditions are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above 13 * copyright notice, this list of conditions and the following 14 * disclaimer in the documentation and/or other materials provided 15 * with the distribution. 16 * 3. The names of the authors may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 27 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 29 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 #ifndef _IF_ADMSWVAR_H_ 34 #define _IF_ADMSWVAR_H_ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: if_admswvar.h,v 1.9 2022/09/29 07:00:46 skrll Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/bus.h> 41 #include <sys/callout.h> 42 #include <sys/device.h> 43 #include <sys/endian.h> 44 #include <sys/errno.h> 45 #include <sys/intr.h> 46 #include <sys/ioctl.h> 47 #include <sys/kernel.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/systm.h> 51 #include <sys/wdog.h> 52 53 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 54 55 #include <net/if.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 #include <net/if_ether.h> 59 60 #include <dev/mii/mii.h> 61 #include <dev/mii/miivar.h> 62 63 #include <dev/sysmon/sysmonvar.h> 64 65 #include <mips/adm5120/include/adm5120reg.h> 66 #include <mips/adm5120/include/adm5120var.h> 67 #include <mips/adm5120/include/adm5120_obiovar.h> 68 69 #include <mips/adm5120/dev/if_admswreg.h> 70 71 #define ADMSW_EVENT_COUNTERS 72 73 #define MAC_BUFLEN 0x07ff 74 75 #define ADMSW_NTXHDESC 4 76 #define ADMSW_NRXHDESC 32 77 #define ADMSW_NTXLDESC 32 78 #define ADMSW_NRXLDESC 32 79 80 #define ADMSW_NTXHDESC_MASK (ADMSW_NTXHDESC - 1) 81 #define ADMSW_NRXHDESC_MASK (ADMSW_NRXHDESC - 1) 82 #define ADMSW_NTXLDESC_MASK (ADMSW_NTXLDESC - 1) 83 #define ADMSW_NRXLDESC_MASK (ADMSW_NRXLDESC - 1) 84 85 #define ADMSW_NEXTTXH(x) (((x) + 1) & ADMSW_NTXHDESC_MASK) 86 #define ADMSW_NEXTRXH(x) (((x) + 1) & ADMSW_NRXHDESC_MASK) 87 #define ADMSW_NEXTTXL(x) (((x) + 1) & ADMSW_NTXLDESC_MASK) 88 #define ADMSW_NEXTRXL(x) (((x) + 1) & ADMSW_NRXLDESC_MASK) 89 90 struct admsw_control_data { 91 /* The transmit descriptors. */ 92 struct admsw_desc acd_txhdescs[ADMSW_NTXHDESC]; 93 94 /* The receive descriptors. */ 95 struct admsw_desc acd_rxhdescs[ADMSW_NRXHDESC]; 96 97 /* The transmit descriptors. */ 98 struct admsw_desc acd_txldescs[ADMSW_NTXLDESC]; 99 100 /* The receive descriptors. */ 101 struct admsw_desc acd_rxldescs[ADMSW_NRXLDESC]; 102 }; 103 104 #define ADMSW_CDOFF(x) offsetof(struct admsw_control_data, x) 105 #define ADMSW_CDTXHOFF(x) ADMSW_CDOFF(acd_txhdescs[(x)]) 106 #define ADMSW_CDTXLOFF(x) ADMSW_CDOFF(acd_txldescs[(x)]) 107 #define ADMSW_CDRXHOFF(x) ADMSW_CDOFF(acd_rxhdescs[(x)]) 108 #define ADMSW_CDRXLOFF(x) ADMSW_CDOFF(acd_rxldescs[(x)]) 109 110 struct admsw_descsoft { 111 struct mbuf *ds_mbuf; 112 bus_dmamap_t ds_dmamap; 113 }; 114 115 /* 116 * Software state per device. 117 */ 118 struct admsw_softc { 119 device_t sc_dev; /* generic device information */ 120 uint8_t sc_enaddr[ETHER_ADDR_LEN]; 121 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 122 bus_space_tag_t sc_st; /* bus space tag */ 123 bus_space_handle_t sc_ioh; /* MAC space handle */ 124 struct sysmon_wdog sc_smw; 125 struct ifmedia sc_ifmedia[SW_DEVS]; 126 int ndevs; /* number of IFF_RUNNING interfaces */ 127 struct ethercom sc_ethercom[SW_DEVS]; /* Ethernet common data */ 128 void *sc_sdhook; /* shutdown hook */ 129 void *sc_ih; /* interrupt cookie */ 130 struct admsw_descsoft sc_txhsoft[ADMSW_NTXHDESC]; 131 struct admsw_descsoft sc_rxhsoft[ADMSW_NRXHDESC]; 132 struct admsw_descsoft sc_txlsoft[ADMSW_NTXLDESC]; 133 struct admsw_descsoft sc_rxlsoft[ADMSW_NRXLDESC]; 134 bus_dmamap_t sc_cddmamap; /* control data DMA map */ 135 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 136 struct admsw_control_data *sc_control_data; 137 #define sc_txhdescs sc_control_data->acd_txhdescs 138 #define sc_rxhdescs sc_control_data->acd_rxhdescs 139 #define sc_txldescs sc_control_data->acd_txldescs 140 #define sc_rxldescs sc_control_data->acd_rxldescs 141 142 int sc_txfree; /* number of free Tx descriptors */ 143 int sc_txnext; /* next Tx descriptor to use */ 144 int sc_txdirty; /* first dirty Tx descriptor */ 145 146 int sc_rxptr; /* next ready Rx descriptor */ 147 148 #ifdef ADMSW_EVENT_COUNTERS 149 struct evcnt sc_ev_txstall; /* Tx stalled */ 150 struct evcnt sc_ev_rxstall; /* Rx stalled */ 151 struct evcnt sc_ev_txintr; /* Tx interrupts */ 152 struct evcnt sc_ev_rxintr; /* Rx interrupts */ 153 #if 1 154 struct evcnt sc_ev_rxsync; /* Rx syncs */ 155 #endif 156 #endif 157 158 }; 159 160 #define ADMSW_CDTXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXHOFF((x))) 161 #define ADMSW_CDTXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXLOFF((x))) 162 #define ADMSW_CDRXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXHOFF((x))) 163 #define ADMSW_CDRXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXLOFF((x))) 164 165 #define ADMSW_CDTXHSYNC(sc, x, ops) \ 166 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 167 ADMSW_CDTXHOFF((x)), sizeof(struct admsw_desc), (ops)) 168 169 #define ADMSW_CDTXLSYNC(sc, x, ops) \ 170 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 171 ADMSW_CDTXLOFF((x)), sizeof(struct admsw_desc), (ops)) 172 173 #define ADMSW_CDRXHSYNC(sc, x, ops) \ 174 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 175 ADMSW_CDRXHOFF((x)), sizeof(struct admsw_desc), (ops)) 176 177 #define ADMSW_CDRXLSYNC(sc, x, ops) \ 178 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 179 ADMSW_CDRXLOFF((x)), sizeof(struct admsw_desc), (ops)) 180 181 #define ADMSW_INIT_RXHDESC(sc, x) \ 182 do { \ 183 struct admsw_descsoft *__ds = &(sc)->sc_rxhsoft[(x)]; \ 184 struct admsw_desc *__desc = &(sc)->sc_rxhdescs[(x)]; \ 185 struct mbuf *__m = __ds->ds_mbuf; \ 186 \ 187 __m->m_data = __m->m_ext.ext_buf + 2; \ 188 __desc->data = __ds->ds_dmamap->dm_segs[0].ds_addr + 2; \ 189 __desc->cntl = 0; \ 190 __desc->len = uimin(MCLBYTES - 2, MAC_BUFLEN - 2); \ 191 __desc->status = 0; \ 192 if ((x) == ADMSW_NRXHDESC - 1) \ 193 __desc->data |= ADM5120_DMA_RINGEND; \ 194 __desc->data |= ADM5120_DMA_OWN; \ 195 ADMSW_CDRXHSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 196 } while (0) 197 198 #define ADMSW_INIT_RXLDESC(sc, x) \ 199 do { \ 200 struct admsw_descsoft *__ds = &(sc)->sc_rxlsoft[(x)]; \ 201 struct admsw_desc *__desc = &(sc)->sc_rxldescs[(x)]; \ 202 struct mbuf *__m = __ds->ds_mbuf; \ 203 \ 204 __m->m_data = __m->m_ext.ext_buf + 2; \ 205 __desc->data = __ds->ds_dmamap->dm_segs[0].ds_addr + 2; \ 206 __desc->cntl = 0; \ 207 __desc->len = uimin(MCLBYTES - 2, MAC_BUFLEN - 2); \ 208 __desc->status = 0; \ 209 if ((x) == ADMSW_NRXLDESC - 1) \ 210 __desc->data |= ADM5120_DMA_RINGEND; \ 211 __desc->data |= ADM5120_DMA_OWN; \ 212 ADMSW_CDRXLSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 213 } while (0) 214 215 void admwdog_attach(struct admsw_softc *); 216 217 #endif /* _IF_ADMSWVAR_H_ */ 218