xref: /netbsd-src/sys/arch/macppc/pci/grackle.c (revision 2a015064ddb9440959d41af721b9eae8c9818e88)
1 /*	$NetBSD: grackle.c,v 1.19 2022/01/21 19:12:28 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000 Tsubai Masanari.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: grackle.c,v 1.19 2022/01/21 19:12:28 thorpej Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/device.h>
34 #include <sys/systm.h>
35 
36 #include <dev/pci/pcivar.h>
37 #include <dev/ofw/openfirm.h>
38 #include <dev/ofw/ofw_pci.h>
39 
40 #include <machine/autoconf.h>
41 #include <machine/pio.h>
42 
43 struct grackle_softc {
44 	device_t sc_dev;
45 	struct genppc_pci_chipset sc_pc;
46 	struct powerpc_bus_space sc_iot;
47 	struct powerpc_bus_space sc_memt;
48 };
49 
50 static void grackle_attach(device_t, device_t, void *);
51 static int grackle_match(device_t, cfdata_t, void *);
52 
53 static pcireg_t grackle_conf_read(void *, pcitag_t, int);
54 static void grackle_conf_write(void *, pcitag_t, int, pcireg_t);
55 
56 CFATTACH_DECL_NEW(grackle, sizeof(struct grackle_softc),
57     grackle_match, grackle_attach, NULL, NULL);
58 
59 static int
grackle_match(device_t parent,cfdata_t cf,void * aux)60 grackle_match(device_t parent, cfdata_t cf, void *aux)
61 {
62 	struct confargs *ca = aux;
63 	char compat[32];
64 
65 	if (strcmp(ca->ca_name, "pci") != 0)
66 		return 0;
67 
68 	memset(compat, 0, sizeof(compat));
69 	OF_getprop(ca->ca_node, "compatible", compat, sizeof(compat));
70 	if (strcmp(compat, "grackle") != 0)
71 		return 0;
72 
73 	return 1;
74 }
75 
76 #define GRACKLE_ADDR 0xfec00000
77 #define GRACKLE_DATA 0xfee00000
78 
79 static void
grackle_attach(device_t parent,device_t self,void * aux)80 grackle_attach(device_t parent, device_t self, void *aux)
81 {
82 	struct grackle_softc *sc = device_private(self);
83 	pci_chipset_tag_t pc = &sc->sc_pc;
84 	struct confargs *ca = aux;
85 	struct pcibus_attach_args pba;
86 	int len, node = ca->ca_node;
87 	uint32_t busrange[2];
88 	struct ranges {
89 		uint32_t pci_hi, pci_mid, pci_lo;
90 		uint32_t host;
91 		uint32_t size_hi, size_lo;
92 	} ranges[6], *rp = ranges;
93 
94 	aprint_normal("\n");
95 	sc->sc_dev = self;
96 
97 	/* PCI bus number */
98 	if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
99 		return;
100 
101 	/* find i/o tag */
102 	len = OF_getprop(node, "ranges", ranges, sizeof(ranges));
103 	if (len == -1)
104 		return;
105 	while (len >= sizeof(ranges[0])) {
106 		if ((rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) ==
107 		     OFW_PCI_PHYS_HI_SPACE_IO) {
108 			sc->sc_iot.pbs_base = rp->host;
109 			sc->sc_iot.pbs_limit = rp->host + rp->size_lo;
110 			break;
111 		}
112 		len -= sizeof(ranges[0]);
113 		rp++;
114 	}
115 
116 	sc->sc_iot.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE;
117 	sc->sc_iot.pbs_offset = 0;
118 	if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_IO, node, &sc->sc_iot,
119 	    "grackle io") != 0)
120 		panic("Can't init grackle io tag");
121 
122 	sc->sc_memt.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE;
123 	sc->sc_memt.pbs_base = 0x00000000;
124 	if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_MEM, node, &sc->sc_memt,
125 	    "grackle mem") != 0)
126 		panic("Can't init grackle mem tag");
127 
128 	macppc_pci_get_chipset_tag(pc);
129 	pc->pc_node = node;
130 	pc->pc_addr = mapiodev(GRACKLE_ADDR, 4, false);
131 	pc->pc_data = mapiodev(GRACKLE_DATA, 4, false);
132 	pc->pc_bus = busrange[0];
133 	pc->pc_conf_read = grackle_conf_read;
134 	pc->pc_conf_write = grackle_conf_write;
135 	pc->pc_memt = &sc->sc_memt;
136 	pc->pc_iot = &sc->sc_iot;
137 
138 	memset(&pba, 0, sizeof(pba));
139 	pba.pba_memt = pc->pc_memt;
140 	pba.pba_iot = pc->pc_iot;
141 	pba.pba_dmat = &pci_bus_dma_tag;
142 	pba.pba_dmat64 = NULL;
143 	pba.pba_bus = pc->pc_bus;
144 	pba.pba_bridgetag = NULL;
145 	pba.pba_pc = pc;
146 	pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
147 
148 	config_found(self, &pba, pcibusprint,
149 	    CFARGS(.devhandle = device_handle(self)));
150 }
151 
152 static pcireg_t
grackle_conf_read(void * cookie,pcitag_t tag,int reg)153 grackle_conf_read(void *cookie, pcitag_t tag, int reg)
154 {
155 	pci_chipset_tag_t pc = cookie;
156 	pcireg_t data;
157 	int s;
158 
159 	if ((unsigned int)reg >= PCI_CONF_SIZE)
160 		return (pcireg_t) -1;
161 
162 	s = splhigh();
163 
164 	out32rb(pc->pc_addr, tag | reg);
165 	data = 0xffffffff;
166 	if (!badaddr(pc->pc_data, 4))
167 		data = in32rb(pc->pc_data);
168 	out32rb(pc->pc_addr, 0);
169 
170 	splx(s);
171 
172 	return data;
173 }
174 
175 static void
grackle_conf_write(void * cookie,pcitag_t tag,int reg,pcireg_t data)176 grackle_conf_write(void *cookie, pcitag_t tag, int reg, pcireg_t data)
177 {
178 	pci_chipset_tag_t pc = cookie;
179 	int s;
180 
181 	if ((unsigned int)reg >= PCI_CONF_SIZE)
182 		return;
183 
184 	s = splhigh();
185 
186 	out32rb(pc->pc_addr, tag | reg);
187 	out32rb(pc->pc_data, data);
188 	out32rb(pc->pc_addr, 0);
189 
190 	splx(s);
191 }
192