xref: /llvm-project/llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll (revision ee08d9cba5615937acf28087da841886cc6a0144)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx908 -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck --check-prefix=GCN %s
3
4; Test using saddr addressing mode of global_* flat atomic instructions.
5
6; --------------------------------------------------------------------------------
7; amdgcn global atomic fadd
8; --------------------------------------------------------------------------------
9
10define amdgpu_ps void @global_fadd_saddr_f32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, float %data) {
11; GCN-LABEL: global_fadd_saddr_f32_nortn:
12; GCN:       ; %bb.0:
13; GCN-NEXT:    global_atomic_add_f32 v0, v1, s[2:3]
14; GCN-NEXT:    s_waitcnt vmcnt(0)
15; GCN-NEXT:    buffer_wbinvl1
16; GCN-NEXT:    s_endpgm
17  %zext.offset = zext i32 %voffset to i64
18  %gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
19  %ret = atomicrmw fadd ptr addrspace(1) %gep0, float %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
20  ret void
21}
22
23define amdgpu_ps void @global_fadd_saddr_f32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, float %data) {
24; GCN-LABEL: global_fadd_saddr_f32_nortn_neg128:
25; GCN:       ; %bb.0:
26; GCN-NEXT:    global_atomic_add_f32 v0, v1, s[2:3] offset:-128
27; GCN-NEXT:    s_waitcnt vmcnt(0)
28; GCN-NEXT:    buffer_wbinvl1
29; GCN-NEXT:    s_endpgm
30  %zext.offset = zext i32 %voffset to i64
31  %gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
32  %gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -128
33  %ret = atomicrmw fadd ptr addrspace(1) %gep1, float %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
34  ret void
35}
36
37define amdgpu_ps void @global_fadd_saddr_v2f16_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, <2 x half> %data) {
38; GCN-LABEL: global_fadd_saddr_v2f16_nortn:
39; GCN:       ; %bb.0:
40; GCN-NEXT:    global_atomic_pk_add_f16 v0, v1, s[2:3]
41; GCN-NEXT:    s_waitcnt vmcnt(0)
42; GCN-NEXT:    buffer_wbinvl1
43; GCN-NEXT:    s_endpgm
44  %zext.offset = zext i32 %voffset to i64
45  %gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
46  %ret = atomicrmw fadd ptr addrspace(1) %gep0, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0
47  ret void
48}
49
50define amdgpu_ps void @global_fadd_saddr_v2f16_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, <2 x half> %data) {
51; GCN-LABEL: global_fadd_saddr_v2f16_nortn_neg128:
52; GCN:       ; %bb.0:
53; GCN-NEXT:    global_atomic_pk_add_f16 v0, v1, s[2:3] offset:-128
54; GCN-NEXT:    s_waitcnt vmcnt(0)
55; GCN-NEXT:    buffer_wbinvl1
56; GCN-NEXT:    s_endpgm
57  %zext.offset = zext i32 %voffset to i64
58  %gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
59  %gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -128
60  %ret = atomicrmw fadd ptr addrspace(1) %gep1, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0
61  ret void
62}
63
64!0 = !{}
65