1 /* $NetBSD: radeon_rv770_dma.c,v 1.2 2021/12/18 23:45:43 riastradh Exp $ */
2
3 /*
4 * Copyright 2013 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Alex Deucher
25 */
26
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: radeon_rv770_dma.c,v 1.2 2021/12/18 23:45:43 riastradh Exp $");
29
30 #include "radeon.h"
31 #include "radeon_asic.h"
32 #include "rv770d.h"
33
34 /**
35 * rv770_copy_dma - copy pages using the DMA engine
36 *
37 * @rdev: radeon_device pointer
38 * @src_offset: src GPU address
39 * @dst_offset: dst GPU address
40 * @num_gpu_pages: number of GPU pages to xfer
41 * @resv: reservation object to sync to
42 *
43 * Copy GPU paging using the DMA engine (r7xx).
44 * Used by the radeon ttm implementation to move pages if
45 * registered as the asic copy callback.
46 */
rv770_copy_dma(struct radeon_device * rdev,uint64_t src_offset,uint64_t dst_offset,unsigned num_gpu_pages,struct dma_resv * resv)47 struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev,
48 uint64_t src_offset, uint64_t dst_offset,
49 unsigned num_gpu_pages,
50 struct dma_resv *resv)
51 {
52 struct radeon_fence *fence;
53 struct radeon_sync sync;
54 int ring_index = rdev->asic->copy.dma_ring_index;
55 struct radeon_ring *ring = &rdev->ring[ring_index];
56 u32 size_in_dw, cur_size_in_dw;
57 int i, num_loops;
58 int r = 0;
59
60 radeon_sync_create(&sync);
61
62 size_in_dw = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT) / 4;
63 num_loops = DIV_ROUND_UP(size_in_dw, 0xFFFF);
64 r = radeon_ring_lock(rdev, ring, num_loops * 5 + 8);
65 if (r) {
66 DRM_ERROR("radeon: moving bo (%d).\n", r);
67 radeon_sync_free(rdev, &sync, NULL);
68 return ERR_PTR(r);
69 }
70
71 radeon_sync_resv(rdev, &sync, resv, false);
72 radeon_sync_rings(rdev, &sync, ring->idx);
73
74 for (i = 0; i < num_loops; i++) {
75 cur_size_in_dw = size_in_dw;
76 if (cur_size_in_dw > 0xFFFF)
77 cur_size_in_dw = 0xFFFF;
78 size_in_dw -= cur_size_in_dw;
79 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_COPY, 0, 0, cur_size_in_dw));
80 radeon_ring_write(ring, dst_offset & 0xfffffffc);
81 radeon_ring_write(ring, src_offset & 0xfffffffc);
82 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff);
83 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff);
84 src_offset += cur_size_in_dw * 4;
85 dst_offset += cur_size_in_dw * 4;
86 }
87
88 r = radeon_fence_emit(rdev, &fence, ring->idx);
89 if (r) {
90 radeon_ring_unlock_undo(rdev, ring);
91 radeon_sync_free(rdev, &sync, NULL);
92 return ERR_PTR(r);
93 }
94
95 radeon_ring_unlock_commit(rdev, ring, false);
96 radeon_sync_free(rdev, &sync, fence);
97
98 return fence;
99 }
100