1 /* $NetBSD: samsung.h,v 1.1.1.3 2019/01/22 14:57:01 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 /* 5 * Samsung's Exynos pinctrl bindings 6 * 7 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 8 * http://www.samsung.com 9 * Author: Krzysztof Kozlowski <krzk@kernel.org> 10 */ 11 12 #ifndef __DT_BINDINGS_PINCTRL_SAMSUNG_H__ 13 #define __DT_BINDINGS_PINCTRL_SAMSUNG_H__ 14 15 #define EXYNOS_PIN_PULL_NONE 0 16 #define EXYNOS_PIN_PULL_DOWN 1 17 #define EXYNOS_PIN_PULL_UP 3 18 19 #define S3C64XX_PIN_PULL_NONE 0 20 #define S3C64XX_PIN_PULL_DOWN 1 21 #define S3C64XX_PIN_PULL_UP 2 22 23 /* Pin function in power down mode */ 24 #define EXYNOS_PIN_PDN_OUT0 0 25 #define EXYNOS_PIN_PDN_OUT1 1 26 #define EXYNOS_PIN_PDN_INPUT 2 27 #define EXYNOS_PIN_PDN_PREV 3 28 29 /* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ 30 #define EXYNOS4_PIN_DRV_LV1 0 31 #define EXYNOS4_PIN_DRV_LV2 2 32 #define EXYNOS4_PIN_DRV_LV3 1 33 #define EXYNOS4_PIN_DRV_LV4 3 34 35 /* Drive strengths for Exynos5260 */ 36 #define EXYNOS5260_PIN_DRV_LV1 0 37 #define EXYNOS5260_PIN_DRV_LV2 1 38 #define EXYNOS5260_PIN_DRV_LV4 2 39 #define EXYNOS5260_PIN_DRV_LV6 3 40 41 /* Drive strengths for Exynos5410, Exynos542x and Exynos5800 */ 42 #define EXYNOS5420_PIN_DRV_LV1 0 43 #define EXYNOS5420_PIN_DRV_LV2 1 44 #define EXYNOS5420_PIN_DRV_LV3 2 45 #define EXYNOS5420_PIN_DRV_LV4 3 46 47 /* Drive strengths for Exynos5433 */ 48 #define EXYNOS5433_PIN_DRV_FAST_SR1 0 49 #define EXYNOS5433_PIN_DRV_FAST_SR2 1 50 #define EXYNOS5433_PIN_DRV_FAST_SR3 2 51 #define EXYNOS5433_PIN_DRV_FAST_SR4 3 52 #define EXYNOS5433_PIN_DRV_FAST_SR5 4 53 #define EXYNOS5433_PIN_DRV_FAST_SR6 5 54 #define EXYNOS5433_PIN_DRV_SLOW_SR1 8 55 #define EXYNOS5433_PIN_DRV_SLOW_SR2 9 56 #define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa 57 #define EXYNOS5433_PIN_DRV_SLOW_SR4 0xb 58 #define EXYNOS5433_PIN_DRV_SLOW_SR5 0xc 59 #define EXYNOS5433_PIN_DRV_SLOW_SR6 0xf 60 61 #define EXYNOS_PIN_FUNC_INPUT 0 62 #define EXYNOS_PIN_FUNC_OUTPUT 1 63 #define EXYNOS_PIN_FUNC_2 2 64 #define EXYNOS_PIN_FUNC_3 3 65 #define EXYNOS_PIN_FUNC_4 4 66 #define EXYNOS_PIN_FUNC_5 5 67 #define EXYNOS_PIN_FUNC_6 6 68 #define EXYNOS_PIN_FUNC_EINT 0xf 69 #define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT 70 71 /* Drive strengths for Exynos7 FSYS1 block */ 72 #define EXYNOS7_FSYS1_PIN_DRV_LV1 0 73 #define EXYNOS7_FSYS1_PIN_DRV_LV2 4 74 #define EXYNOS7_FSYS1_PIN_DRV_LV3 2 75 #define EXYNOS7_FSYS1_PIN_DRV_LV4 6 76 #define EXYNOS7_FSYS1_PIN_DRV_LV5 1 77 #define EXYNOS7_FSYS1_PIN_DRV_LV6 5 78 79 #endif /* __DT_BINDINGS_PINCTRL_SAMSUNG_H__ */ 80