xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/dscc_types.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: dscc_types.h,v 1.2 2021/12/18 23:45:04 riastradh Exp $	*/
2 
3 
4 /*
5  * Copyright 2017 Advanced Micro Devices, Inc.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the "Software"),
9  * to deal in the Software without restriction, including without limitation
10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11  * and/or sell copies of the Software, and to permit persons to whom the
12  * Software is furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
21  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23  * OTHER DEALINGS IN THE SOFTWARE.
24  *
25  * Authors: AMD
26  *
27  */
28 #ifndef __DSCC_TYPES_H__
29 #define __DSCC_TYPES_H__
30 
31 #include <drm/drm_dsc.h>
32 
33 #ifndef NUM_BUF_RANGES
34 #define NUM_BUF_RANGES 15
35 #endif
36 
37 struct dsc_pps_rc_range {
38 	int range_min_qp;
39 	int range_max_qp;
40 	int range_bpg_offset;
41 };
42 
43 struct dsc_parameters {
44 	struct drm_dsc_config pps;
45 
46 	/* Additional parameters for register programming */
47 	uint32_t bytes_per_pixel; /* In u3.28 format */
48 	uint32_t rc_buffer_model_size;
49 };
50 
51 int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, struct dsc_parameters *dsc_params);
52 
53 #endif
54 
55