1 /* $NetBSD: drm_cache.h,v 1.11 2022/05/21 23:42:13 tnn Exp $ */
2
3 /**************************************************************************
4 *
5 * Copyright 2009 Red Hat Inc.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
24 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
25 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
26 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
28 *
29 **************************************************************************/
30 /*
31 * Authors:
32 * Dave Airlie <airlied@redhat.com>
33 */
34
35 #ifndef _DRM_CACHE_H_
36 #define _DRM_CACHE_H_
37
38 #include <linux/scatterlist.h>
39
40 struct page;
41
42 void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
43 void drm_clflush_sg(struct sg_table *st);
44 void drm_clflush_virt_range(void *addr, unsigned long length);
45 bool drm_need_swiotlb(int dma_bits);
46
47
drm_arch_can_wc_memory(void)48 static inline bool drm_arch_can_wc_memory(void)
49 {
50 #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
51 return false;
52 #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON64)
53 return false;
54 #elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
55 /*
56 * The DRM driver stack is designed to work with cache coherent devices
57 * only, but permits an optimization to be enabled in some cases, where
58 * for some buffers, both the CPU and the GPU use uncached mappings,
59 * removing the need for DMA snooping and allocation in the CPU caches.
60 *
61 * The use of uncached GPU mappings relies on the correct implementation
62 * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
63 * will use cached mappings nonetheless. On x86 platforms, this does not
64 * seem to matter, as uncached CPU mappings will snoop the caches in any
65 * case. However, on ARM and arm64, enabling this optimization on a
66 * platform where NoSnoop is ignored results in loss of coherency, which
67 * breaks correct operation of the device. Since we have no way of
68 * detecting whether NoSnoop works or not, just disable this
69 * optimization entirely for ARM and arm64.
70 */
71 return false;
72 #else
73 return true;
74 #endif
75 }
76
77 #endif
78