xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/dpp.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: dpp.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2012-15 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 
29 #ifndef __DAL_DPP_H__
30 #define __DAL_DPP_H__
31 
32 #include "transform.h"
33 
34 struct dpp {
35 	const struct dpp_funcs *funcs;
36 	struct dc_context *ctx;
37 	int inst;
38 	struct dpp_caps *caps;
39 	struct pwl_params regamma_params;
40 	struct pwl_params degamma_params;
41 	struct dpp_cursor_attributes cur_attr;
42 
43 	struct pwl_params shaper_params;
44 	bool cm_bypass_mode;
45 };
46 
47 struct dpp_input_csc_matrix {
48 	enum dc_color_space color_space;
49 	uint16_t regval[12];
50 };
51 
52 static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = {
53 	{COLOR_SPACE_SRGB,
54 		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
55 	{COLOR_SPACE_SRGB_LIMITED,
56 		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
57 	{COLOR_SPACE_YCBCR601,
58 		{0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
59 						0, 0x2000, 0x38b4, 0xe3a6} },
60 	{COLOR_SPACE_YCBCR601_LIMITED,
61 		{0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108,
62 						0, 0x2568, 0x40de, 0xdd3a} },
63 	{COLOR_SPACE_YCBCR709,
64 		{0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
65 						0x2000, 0x3b61, 0xe24f} },
66 
67 	{COLOR_SPACE_YCBCR709_LIMITED,
68 		{0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0,
69 						0x2568, 0x43ee, 0xdbb2} }
70 };
71 
72 struct dpp_grph_csc_adjustment {
73 	struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
74 	enum graphics_gamut_adjust_type gamut_adjust_type;
75 };
76 
77 struct cnv_color_keyer_params {
78 	int color_keyer_en;
79 	int color_keyer_mode;
80 	int color_keyer_alpha_low;
81 	int color_keyer_alpha_high;
82 	int color_keyer_red_low;
83 	int color_keyer_red_high;
84 	int color_keyer_green_low;
85 	int color_keyer_green_high;
86 	int color_keyer_blue_low;
87 	int color_keyer_blue_high;
88 };
89 
90 /* new for dcn2: set the 8bit alpha values based on the 2 bit alpha
91  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0   default: 0b00000000
92  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1   default: 0b01010101
93  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2   default: 0b10101010
94  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3   default: 0b11111111
95  */
96 struct cnv_alpha_2bit_lut {
97 	int lut0;
98 	int lut1;
99 	int lut2;
100 	int lut3;
101 };
102 
103 struct dcn_dpp_state {
104 	uint32_t is_enabled;
105 	uint32_t igam_lut_mode;
106 	uint32_t igam_input_format;
107 	uint32_t dgam_lut_mode;
108 	uint32_t rgam_lut_mode;
109 	uint32_t gamut_remap_mode;
110 	uint32_t gamut_remap_c11_c12;
111 	uint32_t gamut_remap_c13_c14;
112 	uint32_t gamut_remap_c21_c22;
113 	uint32_t gamut_remap_c23_c24;
114 	uint32_t gamut_remap_c31_c32;
115 	uint32_t gamut_remap_c33_c34;
116 };
117 
118 struct CM_bias_params {
119 	uint32_t cm_bias_cr_r;
120 	uint32_t cm_bias_y_g;
121 	uint32_t cm_bias_cb_b;
122 	uint32_t cm_bias_format;
123 };
124 
125 struct dpp_funcs {
126 
127 	void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
128 		uint32_t enable, uint32_t additive_blending);
129 
130 	void (*dpp_program_cm_bias)(
131 		struct dpp *dpp_base,
132 		struct CM_bias_params *bias_params);
133 
134 	void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
135 
136 	void (*dpp_reset)(struct dpp *dpp);
137 
138 	void (*dpp_set_scaler)(struct dpp *dpp,
139 			const struct scaler_data *scl_data);
140 
141 	void (*dpp_set_pixel_storage_depth)(
142 			struct dpp *dpp,
143 			enum lb_pixel_depth depth,
144 			const struct bit_depth_reduction_params *bit_depth_params);
145 
146 	bool (*dpp_get_optimal_number_of_taps)(
147 			struct dpp *dpp,
148 			struct scaler_data *scl_data,
149 			const struct scaling_taps *in_taps);
150 
151 	void (*dpp_set_gamut_remap)(
152 			struct dpp *dpp,
153 			const struct dpp_grph_csc_adjustment *adjust);
154 
155 	void (*dpp_set_csc_default)(
156 		struct dpp *dpp,
157 		enum dc_color_space colorspace);
158 
159 	void (*dpp_set_csc_adjustment)(
160 		struct dpp *dpp,
161 		const uint16_t *regval);
162 
163 	void (*dpp_power_on_regamma_lut)(
164 		struct dpp *dpp,
165 		bool power_on);
166 
167 	void (*dpp_program_regamma_lut)(
168 			struct dpp *dpp,
169 			const struct pwl_result_data *rgb,
170 			uint32_t num);
171 
172 	void (*dpp_configure_regamma_lut)(
173 			struct dpp *dpp,
174 			bool is_ram_a);
175 
176 	void (*dpp_program_regamma_lutb_settings)(
177 			struct dpp *dpp,
178 			const struct pwl_params *params);
179 
180 	void (*dpp_program_regamma_luta_settings)(
181 			struct dpp *dpp,
182 			const struct pwl_params *params);
183 
184 	void (*dpp_program_regamma_pwl)(
185 		struct dpp *dpp,
186 		const struct pwl_params *params,
187 		enum opp_regamma mode);
188 
189 	void (*dpp_program_bias_and_scale)(
190 			struct dpp *dpp,
191 			struct dc_bias_and_scale *params);
192 
193 	void (*dpp_set_degamma)(
194 			struct dpp *dpp_base,
195 			enum ipp_degamma_mode mode);
196 
197 	void (*dpp_program_input_lut)(
198 			struct dpp *dpp_base,
199 			const struct dc_gamma *gamma);
200 
201 	void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,
202 									 const struct pwl_params *params);
203 
204 	void (*dpp_setup)(
205 			struct dpp *dpp_base,
206 			enum surface_pixel_format format,
207 			enum expansion_mode mode,
208 			struct dc_csc_transform input_csc_color_matrix,
209 			enum dc_color_space input_color_space,
210 			struct cnv_alpha_2bit_lut *alpha_2bit_lut);
211 
212 	void (*dpp_full_bypass)(struct dpp *dpp_base);
213 
214 	void (*set_cursor_attributes)(
215 			struct dpp *dpp_base,
216 			struct dc_cursor_attributes *cursor_attributes);
217 
218 	void (*set_cursor_position)(
219 			struct dpp *dpp_base,
220 			const struct dc_cursor_position *pos,
221 			const struct dc_cursor_mi_param *param,
222 			uint32_t width,
223 			uint32_t height
224 			);
225 
226 	void (*dpp_set_hdr_multiplier)(
227 			struct dpp *dpp_base,
228 			uint32_t multiplier);
229 
230 	void (*set_optional_cursor_attributes)(
231 			struct dpp *dpp_base,
232 			struct dpp_cursor_attributes *attr);
233 
234 	void (*dpp_dppclk_control)(
235 			struct dpp *dpp_base,
236 			bool dppclk_div,
237 			bool enable);
238 
239 	bool (*dpp_program_blnd_lut)(
240 			struct dpp *dpp,
241 			const struct pwl_params *params);
242 	bool (*dpp_program_shaper_lut)(
243 			struct dpp *dpp,
244 			const struct pwl_params *params);
245 	bool (*dpp_program_3dlut)(
246 			struct dpp *dpp,
247 			struct tetrahedral_params *params);
248 	void (*dpp_cnv_set_alpha_keyer)(
249 			struct dpp *dpp_base,
250 			struct cnv_color_keyer_params *color_keyer);
251 };
252 
253 
254 
255 #endif
256