xref: /netbsd-src/sys/arch/hp300/dev/diodevs_data.h (revision 03dc8ab333a815f5ae52bdf22633e79aadeba623)
1 /*	$NetBSD: diodevs_data.h,v 1.17 2011/02/19 05:41:38 tsutsui Exp $	*/
2 
3 /*
4  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
5  *
6  * generated from:
7  *	NetBSD: diodevs,v 1.14 2011/02/19 05:40:58 tsutsui Exp
8  */
9 
10 /*-
11  * Copyright (c) 1996 The NetBSD Foundation, Inc.
12  * All rights reserved.
13  *
14  * This code is derived from software contributed to The NetBSD Foundation
15  * by Jason R. Thorpe.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  *    notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  *    notice, this list of conditions and the following disclaimer in the
24  *    documentation and/or other materials provided with the distribution.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #define DIO_NDEVICES	48
40 
41 struct dio_devdata dio_devdatas[] = {
42 	{ 0x02,	0,	1 },
43 	{ 0x82,	0,	1 },
44 	{ 0x42,	0,	1 },
45 	{ 0xc2,	0,	1 },
46 	{ 0x05,	0,	1 },
47 	{ 0x85,	0,	1 },
48 	{ 0x15,	0,	1 },
49 	{ 0x08,	0,	1 },
50 	{ 0x01,	0,	1 },
51 	{ 0x00,	0,	1 },
52 	{ 0x07,	0,	1 },
53 	{ 0x27,	0,	1 },
54 	{ 0x47,	0,	1 },
55 	{ 0x67,	0,	1 },
56 	{ 0x39,	0,	1 },
57 	{ 0x39,	0x01,	1 },
58 	{ 0x39,	0x02,	1 },
59 	{ 0x39,	0x04,	2 },
60 	{ 0x39,	0x05,	1 },
61 	{ 0x39,	0x06,	1 },
62 	{ 0x39,	0x07,	1 },
63 	{ 0x39,	0x08,	2 },
64 	{ 0x39,	0x09,	1 },
65 	{ 0x39,	0x0c,	3 },
66 	{ 0x39,	0x0e,	1 },
67 	{ 0x39,	0x10,	4 },
68 	{ 0x39,	0x11,	4 },
69 	{ 0x39,	0x0b,	1 },
70 	{ 0x39,	0x0d,	1 },
71 	{ 0x03,	0,	1 },
72 	{ 0x04,	0,	1 },
73 	{ 0x06,	0,	1 },
74 	{ 0x09,	0,	1 },
75 	{ 0x0a,	0,	1 },
76 	{ 0x0b,	0,	1 },
77 	{ 0x12,	0,	1 },
78 	{ 0x13,	0,	1 },
79 	{ 0x16,	0,	1 },
80 	{ 0x19,	0,	1 },
81 	{ 0x1a,	0,	4 },
82 	{ 0x1b,	0,	1 },
83 	{ 0x1c,	0,	1 },
84 	{ 0x1d,	0,	1 },
85 	{ 0x1e,	0,	1 },
86 	{ 0x1f,	0,	1 },
87 	{ 0x31,	0,	2 },
88 	{ 0x34,	0,	1 },
89 	{ 0xb4,	0,	1 },
90 };
91 
92 #ifdef DIOVERBOSE
93 struct dio_devdesc dio_devdescs[] = {
94 	{ 0x02,	0,	DIO_DEVICE_DESC_DCA0 },
95 	{ 0x82,	0,	DIO_DEVICE_DESC_DCA0REM },
96 	{ 0x42,	0,	DIO_DEVICE_DESC_DCA1 },
97 	{ 0xc2,	0,	DIO_DEVICE_DESC_DCA1REM },
98 	{ 0x05,	0,	DIO_DEVICE_DESC_DCM },
99 	{ 0x85,	0,	DIO_DEVICE_DESC_DCMREM },
100 	{ 0x15,	0,	DIO_DEVICE_DESC_LAN },
101 	{ 0x08,	0,	DIO_DEVICE_DESC_FHPIB },
102 	{ 0x01,	0,	DIO_DEVICE_DESC_NHPIB },
103 	{ 0x00,	0,	DIO_DEVICE_DESC_IHPIB },
104 	{ 0x07,	0,	DIO_DEVICE_DESC_SCSI0 },
105 	{ 0x27,	0,	DIO_DEVICE_DESC_SCSI1 },
106 	{ 0x47,	0,	DIO_DEVICE_DESC_SCSI2 },
107 	{ 0x67,	0,	DIO_DEVICE_DESC_SCSI3 },
108 	{ 0x39,	0,	DIO_DEVICE_DESC_FRAMEBUFFER },
109 	{ 0x39,	0x01,	DIO_DEVICE_DESC_GATORBOX },
110 	{ 0x39,	0x02,	DIO_DEVICE_DESC_TOPCAT },
111 	{ 0x39,	0x04,	DIO_DEVICE_DESC_RENAISSANCE },
112 	{ 0x39,	0x05,	DIO_DEVICE_DESC_LRCATSEYE },
113 	{ 0x39,	0x06,	DIO_DEVICE_DESC_HRCCATSEYE },
114 	{ 0x39,	0x07,	DIO_DEVICE_DESC_HRMCATSEYE },
115 	{ 0x39,	0x08,	DIO_DEVICE_DESC_DAVINCI },
116 	{ 0x39,	0x09,	DIO_DEVICE_DESC_XXXCATSEYE },
117 	{ 0x39,	0x0c,	DIO_DEVICE_DESC_TIGERSHARK },
118 	{ 0x39,	0x0e,	DIO_DEVICE_DESC_HYPERION },
119 	{ 0x39,	0x10,	DIO_DEVICE_DESC_A1474MID },
120 	{ 0x39,	0x11,	DIO_DEVICE_DESC_A147xVGA },
121 	{ 0x39,	0x0b,	DIO_DEVICE_DESC_XGENESIS },
122 	{ 0x39,	0x0d,	DIO_DEVICE_DESC_YGENESIS },
123 	{ 0x03,	0,	DIO_DEVICE_DESC_MISC0 },
124 	{ 0x04,	0,	DIO_DEVICE_DESC_MISC1 },
125 	{ 0x06,	0,	DIO_DEVICE_DESC_PARALLEL },
126 	{ 0x09,	0,	DIO_DEVICE_DESC_MISC2 },
127 	{ 0x0a,	0,	DIO_DEVICE_DESC_MISC3 },
128 	{ 0x0b,	0,	DIO_DEVICE_DESC_MISC4 },
129 	{ 0x12,	0,	DIO_DEVICE_DESC_MISC5 },
130 	{ 0x13,	0,	DIO_DEVICE_DESC_AUDIO },
131 	{ 0x16,	0,	DIO_DEVICE_DESC_MISC6 },
132 	{ 0x19,	0,	DIO_DEVICE_DESC_MISC7 },
133 	{ 0x1a,	0,	DIO_DEVICE_DESC_MISC8 },
134 	{ 0x1b,	0,	DIO_DEVICE_DESC_MISC9 },
135 	{ 0x1c,	0,	DIO_DEVICE_DESC_MISC10 },
136 	{ 0x1d,	0,	DIO_DEVICE_DESC_MISC11 },
137 	{ 0x1e,	0,	DIO_DEVICE_DESC_MISC12 },
138 	{ 0x1f,	0,	DIO_DEVICE_DESC_MISC13 },
139 	{ 0x31,	0,	DIO_DEVICE_DESC_VME },
140 	{ 0x34,	0,	DIO_DEVICE_DESC_DCL },
141 	{ 0xb4,	0,	DIO_DEVICE_DESC_DCLREM },
142 };
143 #endif /* DIOVERBOSE */
144