xref: /netbsd-src/sys/dev/pci/iop_pci.c (revision d3cda6139a6a0678a420b8a6e1bef0e6269c13a3)
1 /*	$NetBSD: iop_pci.c,v 1.30 2018/12/09 11:14:02 jdolecek Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Andrew Doran.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * PCI front-end for `iop' driver.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: iop_pci.c,v 1.30 2018/12/09 11:14:02 jdolecek Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/device.h>
43 #include <sys/queue.h>
44 #include <sys/proc.h>
45 
46 #include <machine/endian.h>
47 #include <sys/bus.h>
48 
49 #include <dev/pci/pcidevs.h>
50 #include <dev/pci/pcivar.h>
51 
52 #include <dev/i2o/i2o.h>
53 #include <dev/i2o/iopreg.h>
54 #include <dev/i2o/iopio.h>
55 #include <dev/i2o/iopvar.h>
56 
57 #define	PCI_INTERFACE_I2O_POLLED	0x00
58 #define	PCI_INTERFACE_I2O_INTRDRIVEN	0x01
59 
60 static void	iop_pci_attach(device_t, device_t, void *);
61 static int	iop_pci_match(device_t, cfdata_t, void *);
62 
63 CFATTACH_DECL_NEW(iop_pci, sizeof(struct iop_softc),
64     iop_pci_match, iop_pci_attach, NULL, NULL);
65 
66 static int
iop_pci_match(device_t parent,cfdata_t match,void * aux)67 iop_pci_match(device_t parent, cfdata_t match, void *aux)
68 {
69 	struct pci_attach_args *pa;
70 	u_int product, vendor;
71 	pcireg_t reg;
72 
73 	pa = aux;
74 
75 	/*
76 	 * Look for an "intelligent I/O processor" that adheres to the I2O
77 	 * specification.  Ignore the device if it doesn't support interrupt
78 	 * driven operation.
79 	 */
80 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O &&
81 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_I2O_STANDARD &&
82 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_I2O_INTRDRIVEN)
83 		return (1);
84 
85 	/*
86 	 * Match boards that don't conform exactly to the spec.
87 	 */
88 	vendor = PCI_VENDOR(pa->pa_id);
89 	product = PCI_PRODUCT(pa->pa_id);
90 
91 	if (vendor == PCI_VENDOR_DPT &&
92 	    (product == PCI_PRODUCT_DPT_RAID_I2O ||
93 	    product == PCI_PRODUCT_DPT_RAID_2005S))
94 		return (1);
95 
96 	if (vendor == PCI_VENDOR_INTEL &&
97 	    (product == PCI_PRODUCT_INTEL_80960RM_2 ||
98 	    product == PCI_PRODUCT_INTEL_80960_RP)) {
99 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
100 		if (PCI_VENDOR(reg) == PCI_VENDOR_PROMISE)
101 			return (1);
102 	}
103 
104 	return (0);
105 }
106 
107 static void
iop_pci_attach(device_t parent,device_t self,void * aux)108 iop_pci_attach(device_t parent, device_t self, void *aux)
109 {
110 	struct pci_attach_args *pa;
111 	struct iop_softc *sc;
112 	pci_chipset_tag_t pc;
113 	pci_intr_handle_t ih;
114 	const char *intrstr;
115 	pcireg_t reg;
116 	int i;
117 	char intrbuf[PCI_INTRSTR_LEN];
118 
119 	sc = device_private(self);
120 	sc->sc_dev = self;
121 	pa = aux;
122 	pc = pa->pa_pc;
123 	printf(": ");
124 
125 	/*
126 	 * The kernel always uses the first memory mapping to communicate
127 	 * with the IOP.
128 	 */
129 	for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
130 		reg = pci_conf_read(pc, pa->pa_tag, i);
131 		if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_MEM) {
132 			sc->sc_memaddr = PCI_MAPREG_MEM_ADDR(reg);
133 			break;
134 		}
135 	}
136 	if (i == PCI_MAPREG_END) {
137 		aprint_error("can't find mapping\n");
138 		return;
139 	}
140 
141 	/* Map the register window. */
142 	if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_MEM, 0, &sc->sc_iot,
143 	    &sc->sc_ioh, NULL, NULL)) {
144 		aprint_error_dev(self, "can't map register window\n");
145 		return;
146 	}
147 
148 	/* Map the 2nd register window. */
149 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DPT &&
150 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DPT_RAID_2005S) {
151 		i += 4;	/* next BAR */
152 		if (i == PCI_MAPREG_END) {
153 			aprint_error("can't find mapping\n");
154 			return;
155 		}
156 
157 #if 0
158 		/* Should we check it? (see FreeBSD's asr driver) */
159 		reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
160 		printf("subid %x, %x\n", PCI_VENDOR(reg), PCI_PRODUCT(reg));
161 #endif
162 		if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_MEM, 0,
163 		    &sc->sc_msg_iot, &sc->sc_msg_ioh, NULL, NULL)) {
164 			aprint_error_dev(self,
165 			    "can't map 2nd register window\n");
166 			return;
167 		}
168 	} else {
169 		/* iop devices other than 2005S */
170 		sc->sc_msg_iot = sc->sc_iot;
171 		sc->sc_msg_ioh = sc->sc_ioh;
172 	}
173 
174 	sc->sc_pcibus = pa->pa_bus;
175 	sc->sc_pcidev = pa->pa_device;
176 	sc->sc_dmat = pa->pa_dmat;
177 	sc->sc_bus_memt = pa->pa_memt;
178 	sc->sc_bus_iot = pa->pa_iot;
179 
180 	/* Enable the device. */
181 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
182 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
183 		       reg | PCI_COMMAND_MASTER_ENABLE);
184 
185 	/* Map and establish the interrupt.. */
186 	if (pci_intr_map(pa, &ih)) {
187 		aprint_error("can't map interrupt\n");
188 		return;
189 	}
190 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
191 	sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, iop_intr, sc,
192 	    device_xname(self));
193 	if (sc->sc_ih == NULL) {
194 		aprint_error("can't establish interrupt");
195 		if (intrstr != NULL)
196 			aprint_error(" at %s", intrstr);
197 		aprint_error("\n");
198 		return;
199 	}
200 
201 	/* Attach to the bus-independent code. */
202 	iop_init(sc, intrstr);
203 }
204